Semiconductor package including a heat dissipation metal member and method of manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorYoungbae Kim
Life of this patent
Estimating the term…
Abstract
A semiconductor package includes a redistribution substrate, a chip stack structure disposed on the redistribution substrate and including a plurality of semiconductor chips disposed in a stack, a vertical wiring portion connecting the chip stack structure to the redistribution substrate and including a plurality of vertical wires that extend in a direction perpendicular to an upper surface of the redistribution substrate, a sealing member configured to seal at least a portion the chip stack structure and the vertical wiring portion, and a heat dissipation metal member disposed on side surfaces and an upper surface of the sealing member.
Claims20
A semiconductor package comprising:
- a redistribution substrate;
- a chip stack structure disposed on the redistribution substrate and comprising a plurality of semiconductor chips disposed in a stack;
- a vertical wiring portion connecting the chip stack structure to the redistribution substrate and comprising a plurality of vertical wires that extend in a direction perpendicular to an upper surface of the redistribution substrate;
- a sealing member configured to seal at least a portion of the chip stack structure and the vertical wiring portion;
- and
- a heat dissipation metal member disposed on side surfaces and an upper surface of the sealing member.
A semiconductor package comprising:
- a redistribution substrate;
- a chip stack structure disposed on and spaced apart from the redistribution substrate and comprising a plurality of semiconductor chips disposed in a stack;
- a vertical wiring portion connecting the chip stack structure to the redistribution substrate and comprising a plurality of vertical wires that extend in a direction perpendicular to an upper surface of the redistribution substrate;
- a sealing member configured to seal at least a portion of the chip stack structure and the vertical wiring portion and to fill a space between the redistribution substrate and the chip stack structure;
- and
- a heat dissipation metal member disposed on side surfaces and an upper surface of the sealing member.
A semiconductor package comprising:
- a redistribution substrate;
- a chip stack structure disposed on the redistribution substrate and comprising a plurality of semiconductor chips disposed in a stack;
- a vertical wiring portion connecting the chip stack structure to the redistribution substrate and comprising a plurality of vertical wires that extend between an upper surface of the redistribution substrate and a lower surface of each semiconductor chip of the chip stack structure;
- and
- a heat dissipation metal member surrounding the chip stack structure and comprising an upper plate to which an uppermost semiconductor chip of the chip stack structure is adhered by a thermal interface adhesive layer.
Dependencies are inferred from the claim text.