Method and apparatus for memory testing
AssigneeWinbond Electronics Corp.
InventorsChien-Min Wu, Shao-Ching Liao, Kuang-Chih Hsieh
Life of this patent
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Abstract
A method and an apparatus for memory testing are provided. The method includes following steps: after multiple dies are idle for a first time, performing a first stage test on the dies, and setting multiple flags corresponding to the dies that fail the first stage test to a first logic level; after the dies are idle for a second time, performing a second stage test on the dies, and regarding the dies that pass the second stage test and have the corresponding flags set to the first logic level as suspected good dies and keeping the suspected good dies idle; and after the suspected good dies are idle for a third time, performing a third stage test on the suspected good dies.
Claims20
A memory testing method, comprising:
- after a plurality of die are idle for a first time, performing a first stage test on the die, and setting a plurality of flags corresponding to a plurality of dies that fail the first stage test to a first logic level;
- after the dies are idle for a second time, performing a second stage test on the plurality of dies, and regarding the plurality of dies that pass the second stage test and have the corresponding flags set to the first logic level as a plurality of suspected good dies and keeping the plurality of suspected good dies idle;
- and
- after the plurality of suspected good dies are idle for a third time, performing a third stage test on the plurality of suspected good dies.
A memory testing apparatus, comprising:
- a clamp, configured to hold a plurality of dies to be tested;
- a storage device, configured to store a plurality of flags respectively corresponding to the plurality of dies;
- and
- a test control device, coupled to the clamp and the storage device, configured to detect a target memory cell corresponding to a tail bit of each of the plurality of dies,
- wherein, after the plurality of dies are idle for a first time, the test control device performs a first stage test on the plurality of dies, and sets the plurality of flags corresponding to the plurality of dies that fail the first stage test to a first logic level,
- after the plurality of dies are idle for a second time, the test control device performs a second stage test on the plurality of dies, and regards the plurality of dies that pass the second stage test and have the corresponding plurality of flags set to the first logical level as a plurality of suspected good dies and keeps the plurality of suspected good dies idle,
- after the plurality of suspected good dies are idle for a third time, the test control device performs a third stage test on the plurality of suspected good dies.
Dependencies are inferred from the claim text.