System and method for generating recipe recommendations during logic synthesis optimization of electronic circuits
OwnerRaika Karimi, Faezeh Faez +2inventors
InventorsRaika Karimi, Faezeh Faez, Yingxue Zhang, Mahdi Biparva
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Abstract
A method is performed by a trained recipe recommendation model. The method comprises loading a plurality of circuits into a circuit data loader; separately loading a plurality of recipes into a recipe data loader; and generating a recommended recipe for each circuit based on at least one quality of result determined during logic synthesis optimization.
Claims20
A method performed by a trained recipe recommendation model comprising:
- loading a plurality of circuits into a circuit data loader;
- separately loading a plurality of recipes into a recipe data loader;
- and
- generating a recommended recipe for each circuit based on at least one quality of result determined during logic synthesis optimization.
A computer system comprising:
- a processor;
- and
- a memory coupled to the processor and storing a trained recipe recommendation model that includes processor-executable instructions which, when executed by the processor, configure the processor to:
- load a plurality of circuits into a circuit data loader;
- separately load a plurality of recipes into a recipe data loader;
- and
- generate a recommended recipe for each circuit based on at least one quality of result determined during logic synthesis optimization.
A non-transitory computer readable storage medium comprising processor-executable instructions which, when executed, configure a processor to:
- engage a trained recipe recommendation module to:
- load a plurality of circuits into a circuit data loader;
- separately load a plurality of recipes into a recipe data loader;
- and
- generate a recommended recipe for each circuit based on at least one quality of result determined during logic synthesis optimization.
Dependencies are inferred from the claim text.