Idle channel marking for partitioned processor communication
AssigneeGroq, Inc.
InventorsDinesh Maheshwari, Benjamin Charles Serebrin
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Abstract
Systems and methods described herein provide for: generating a deterministic schedule defining operating states of a deterministic processor; determining, based on the deterministic schedule, an idle condition for a communication channel of the deterministic processor; configuring, based on the idle condition, the communication channel in an idle state; and suppressing a first uncorrectable error detected in data received over the communication channel while in the idle state.
Claims20
A method, comprising:
- generating a deterministic schedule defining operating states of a deterministic processor;
- determining, based on the deterministic schedule, an idle condition for a communication channel of the deterministic processor;
- and
- configuring, based on the idle condition, the communication channel in an idle state.
A computing system, comprising:
- one or more processors;
- and
- one or more non-transitory, computer-readable media storing instructions that, when implemented, cause the one or more processors to perform operations comprising:
- generating a deterministic schedule defining operating states of a deterministic processor;
- determining, based on the deterministic schedule, an idle condition for a communication channel of the deterministic processor;
- and
- configuring, based on the idle condition, the communication channel in an idle state.
One or more non-transitory, computer-readable media storing instructions that, when implemented, cause one or more processors to perform operations comprising:
- generating a deterministic schedule defining operating states of a deterministic processor;
- determining, based on the deterministic schedule, an idle condition for a communication channel of the deterministic processor;
- configuring, based on the idle condition, the communication channel in an idle state.
Dependencies are inferred from the claim text.