System-on-chip and operating method thereof
AssigneeSamsung Electronics Co., Ltd.
InventorsMoongyung KIM, Euiyeon WON, Youngsik EOM
Life of this patent
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Abstract
A system-on-chip includes a translation lookaside buffer (TLB) that stores a portion of address translation information for translating between virtual addresses and physical addresses, a core that executes an instruction and accesses the TLB, a page table walker that performs a page table walk operation of searching a page table that stores the address translation information, and a static page management (SPM) circuit that, when a physical address is obtained from a virtual address included in static address translation information corresponding to a static page among the address translation information, stops access to the TLB by the core or stops the page table walk operation.
Claims21
A system-on-chip comprising:
- a translation lookaside buffer (TLB) that stores a portion of address translation information for translating between virtual addresses and physical addresses;
- at least one core configured to execute an instruction and to access the TLB;
- a page table walker configured to perform a page table walk operation of searching a page table that stores the address translation information;
- and
- a static page management (SPM) circuit configured to, when a physical address is obtained from a virtual address included in static address translation information corresponding to a static page among the address translation information, stop access to the TLB by the at least one core or stop the page table walk operation.
An operating method of a system-on-chip, the operating method comprising:
- starting a first search operation of searching a translation lookaside buffer (TLB) that stores address translation information corresponding to a static page and a dynamic page, the address translation information being for translating between virtual addresses and physical addresses;
- starting a second search operation of searching a static page management buffer that stores static address translation information corresponding to the static page;
- and
- obtaining a physical address corresponding to a virtual address, based on a result of the first search operation or a result of the second search operation,
- wherein, in response to the result of the second search operation being received while the first search operation is still being performed, stopping the first search operation.
An operating method of a system-on-chip, the operating method comprising:
- performing a first search operation of searching a translation lookaside buffer (TLB) that stores address translation information for a dynamic page and a static page, the address translation information being for translating between virtual addresses and physical addresses;
- performing a second search operation of searching a page table that is stored in a memory device, based on a result of the first search operation;
- and
- replacing address translation information for the dynamic page in preference to replacing address translation information for the static page, in at least one of the TLB and the page table, based on the result of the first search operation and a result of the second search operation.
(canceled)
Dependencies are inferred from the claim text.