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US 2026/0010477 A1Published application
Systems and methods for port based routing for scalable memory
AssigneeSamsung Electronics Co., Ltd.
InventorsByung Choi, Changho Choi
Life of this patent
Estimating the term…
Abstract
A system including: a first memory layer including: a first memory node of a memory pool; and a second memory node of the memory pool, the second memory node being connected to the first memory node by one link in the first memory layer; and a switch to provide access to the first memory node from the second memory node based on: a first identifier corresponding to the first memory layer; and a second identifier corresponding to a location of the first memory node in the memory pool.
Claims20
A system comprising:
- a first memory layer comprising:
- a first memory node of a memory pool;
- and
- a second memory node of the memory pool, the second memory node being connected to the first memory node by one link in the first memory layer;
- and
- a switch configured to provide access to the first memory node from the second memory node based on:
- a first identifier corresponding to the first memory layer;
- and
- a second identifier corresponding to a location of the first memory node in the memory pool.
6 more elements
A method comprising:
- receiving instructions to access a first memory node located in a first memory layer of a memory pool;
- identifying, from the instructions, a first identifier corresponding to the first memory layer and a second identifier corresponding to a location of the first memory node in the memory pool from a location of a second memory node connected to the first memory node by one link in the first memory layer;
- and
- providing access from the second memory node to the first memory node based on the first identifier and the second identifier.
1 more element
A system comprising:
- a memory pool;
- one or more processors connected to the memory pool;
- and
- instructions that, when executed by the one or more processors, cause the one or more processors to:
- receive a command to provide access to a first memory node located in a first memory layer of a memory pool;
- identify, from the command, a first identifier corresponding to the first memory layer and a second identifier corresponding to a location of the first memory node in the memory pool from a location of a second memory node connected to the first memory node by one link in the first memory layer;
- and
- provide access from the second memory node to the first memory node based on the first identifier and the second identifier,
- wherein the first identifier is encoded in first bits of the command, and the second identifier is encoded in second bits of the command.
6 more elements
Dependencies are inferred from the claim text.