Systems and methods for improved testing of system implementation given partially defined input values and expected output values

A non-transitory, computer readable medium storing instructions which, when executed by one or more processors, cause the one or more processors to perform a process, the process comprising:

• receiving an original test vector based on requirements for a system, wherein at least one system input is defined for the original test vector and a first system input is undefined for the original test vector, wherein an expected value for at least one output is defined for the original test vector;
• generating extended test vectors for the original test vector by replacing the first system input that is undefined for the original test vector with different values, wherein each respective extended test vector includes a different value for the first system input;
• executing the extended test vectors on a target platform;
• and
• verifying whether outputs generated during the execution match expected values for the defined system outputs.

A system, comprising:

• an input configured to receive information about a system under test, wherein the system under test includes:
• one or more inputs, wherein a value for at least one input of the one or more inputs is undefined for a test vector based on requirements for the system under test;
• one or more functions, wherein each function of the one or more functions is configured to generate a respective function output based on, at least in part, a value of at least one of the one or more inputs;
• and
• one or more outputs, wherein each output of the one or more outputs is configured to generate a respective output value based on, at least in part, at least one of the respective function outputs;
• and
• one or more computational elements coupled to a memory, wherein the one or more computational elements are configured to:
• receive a test vector file that includes one or more test vectors, wherein each test vector is based on requirements for the system under test, wherein at least one system input is undefined for at least one execution step of each of the one or more test vectors;
• generate respective extended test vectors for each respective test vector of the one or more test vectors by replacing undefined system inputs for the respective test vector with different values, wherein the respective extended test vectors generated from the respective test vector include different combinations of values for the undefined system inputs for the respective test vector;
• and
• generate an extended test vector file that includes the generated extended test vectors for each respective test vector of the one or more test vectors.