System on a chip, test device for testing system on a chip and test method thereof

A test device for testing System on a Chip, wherein the System on a Chip comprises a one-time programmable memory, and wherein the one-time programmable memory comprises multiple setting bits, the test device comprising:

• an input unit;
• a test data memory;
• a processor, coupled to the test data memory, configured to receive multiple test data coming from outside, write the multiple test data into the test data memory, select selected test data from the multiple test data in response to operation of the input unit, and provide the selected test data to the System on a Chip by a transmission protocol,
• wherein the System on a Chip receives the selected test data based on the transmission protocol, selects partial bit values of the test data based on bit values of the multiple setting bits, and performs a test operation based on the partial bit values.

A test method for testing System on a Chip, wherein the System on a Chip comprises a function register and a one-time programmable memory, wherein the function register comprises multiple functional bits, and wherein the one-time programmable memory comprises multiple setting bits and multiple operating bits, the test methods comprising:

• receiving test data by the System on a Chip;
• when a bit value of a first setting bit among the multiple setting bits is a first value, writing data coming from a first operating bit among the multiple operating bits into a first functional bit among the multiple functional bits;
• when the bit value of the first setting bit is a second value, writing a first bit value of the test data into the first functional bit among the multiple functional bits;
• and
• performing a test operation by the System on a Chip based on data of at least one of the multiple functional bits.