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US 2026/0010441 A1Published application
Memory device and operation method for generating check points based on write data pattern
AssigneeSK hynix Inc.
InventorHye Mi KANG
Life of this patent
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Abstract
A memory system includes a memory device and a controller. The memory device includes a plurality of memory blocks. The controller recognizes a change in a pattern of a plurality of write data, delays a checkpoint operation associated with a write operation regarding the plurality of write data entries when operational data regarding the plurality of write data entries is within a range that is capable of being stored in a buffer, and performs the checkpoint operation when the operational data is beyond the range.
Claims8
A memory system, comprising:
- a memory device comprising a plurality of memory blocks;
- and
- a controller configured to check whether a size of map data associated with at least one write data entry is within a range that is capable of being stored in a buffer and perform a checkpoint operation based on a checking result.
A method for operating a memory system, comprising:
- checking whether a size of map data associated with at least one write data entry is within a range that is capable of being stored in a buffer;
- and
- performing a checkpoint operation based on a checking result.
Dependencies are inferred from the claim text.