Technologies for interconnect address remapper with event recognition and register management

A method for system-level monitoring in an integrated circuit, the method comprising:

• storing, in an interconnect address remapper, one or more translation regions, each translation region defined by a From Address range;
• receiving, at the interconnect address remapper, a transaction from a processor core;
• detecting a match when an address of the transaction corresponds to the From Address range of at least one of the one or more translation regions;
• and
• providing, from a monitor interface and in response to the detected match, a match signal and a matching region identification signal for system-level monitoring.

A non-transitory computer readable medium comprising a circuit representation that, when processed by a computer, is used to program or manufacture an integrated circuit comprising:

• a processor core configured to execute instructions;
• an interconnect address remapper configured to:
• store one or more translation regions, each translation region defined by a From Address range;
• and
• detect a match when an address associated with a transaction from the processor core corresponds to the From Address range of at least one of the one or more translation regions;
• and
• a monitor interface configured to provide, for system-level monitoring and in response to the detected match, a match signal and a matching region identification signal.