# US 2025/0385683 A1 · Signal processing systems with mitigation of interference between alike calibrations > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2025/0385683 A1 - Document ID: US20250385683A1 - Status: Published application - Kind: A1 - Application number: 19/222,697 - Filed: 2025-05-29 - Published: 2025-12-18 - Earliest claimed: 2024-06-13 - Assignees: Analog Devices International Unlimited Company - Applicants: Analog Devices International Unlimited Company - Inventors: Nicholas S. Zakas; Cristian Enrique Alvarez Fontecilla; Huseyin Dinc; Snehal Prabhu - Web page: https://patentgrep.com/patent/US20250385683A1 ## CPC - H03M 1/1014: {at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error (gain setting for range control H03M1/18)} - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract Signal processing systems with mitigation of interference of between alike calibrations are disclosed. In certain embodiments, a signal processing system includes a shared signal processing channel that processes an input signal to generate an output signal, and two or more signal processing slices that each process the output signal from the shared signal processing channel. The shared signal processing channel has an error of a first type, and the signal processing slices each have an error of the first type. The signal processing system further includes a calibration system that provides the signal processing slices with slice correction coefficients that compensate the signal processing slices for the slice errors. The calibration system adjusts each of the slice correction coefficients based on an estimate of the error of the shared signal processing channel. ## Claims ### Claim 1 A signal processing system with mitigation of interference between alike calibrations, the signal processing system comprising: a shared signal processing channel configured to process an input signal to generate an output signal, the shared signal processing channel having a first error of a first type; a plurality of signal processing slices each configured to process the output signal from the shared signal processing channel, the plurality of signal processing slices having a plurality of errors of the first type; and a calibration system configured to provide the plurality of signal processing slices with a plurality of slice correction coefficients that compensate the plurality of signal processing slices for the plurality of errors, wherein the calibration system adjusts each of the plurality of slice correction coefficients based on an estimate of the first error. ### Claim 2 (depends on 1) The signal processing system of claim 1, wherein the calibration system generates estimates of the plurality of errors of the signal processing slices, and subtracts the estimate of the first error from the estimates to generate corrected estimates. ### Claim 3 (depends on 2) The signal processing system of claim 2, wherein the calibration system includes a plurality of first accumulators that receive the corrected estimates and generate the plurality of slice correction coefficients. ### Claim 4 (depends on 3) The signal processing system of claim 3, wherein the calibration system further includes a second accumulator that generates the estimate of the first error based on an average of the plurality of slice correction coefficients. ### Claim 5 (depends on 1) The signal processing system of claim 1, wherein the shared signal processing channel further has a second error of a second type. ### Claim 6 (depends on 5) The signal processing system of claim 5, wherein the first type of error is an offset and the second type of error is a nonlinearity. ### Claim 7 (depends on 1) The signal processing system of claim 1, wherein the first type of error is one of an offset, a gain error, a nonlinearity, a memory effect, or a capacitor mismatch. ### Claim 8 (depends on 1) The signal processing system of claim 1, wherein the shared signal processing channel includes an amplifier. ### Claim 9 (depends on 1) The signal processing system of claim 1, wherein the plurality of signal processing slices correspond to a plurality of analog-to-digital (ADC) data conversion channels of a pipelined ADC. ### Claim 10 (depends on 1) The signal processing system of claim 1, wherein the plurality of signal processing slices include a plurality of quantizers that generate a plurality of digital slice output signals, and a plurality of adders that add the plurality of slice correction coefficients with a corresponding one of the plurality of digital slice output signals to generate a plurality of corrected digital slice output signals. ### Claim 11 (depends on 10) The signal processing system of claim 10, wherein the calibration system generates estimates of the plurality of errors of the signal processing slices based on averaging the plurality of corrected digital slice output signals. ### Claim 12 (depends on 10) The signal processing system of claim 10, further comprising a combiner that combines the plurality of corrected digital slice output signals to generate a combined digital output signal at an output, wherein the calibration system further includes an error estimation block for the first error downstream from the output of the combiner. ### Claim 13 (depends on 12) The signal processing system of claim 12, wherein the calibration system provides the estimate of the first error to the error estimation block for the first error. ### Claim 14 (depends on 1) The signal processing system of claim 1, wherein the plurality of signal processing slices operate in parallel to process the output signal. ### Claim 15 (depends on 1) The signal processing system of claim 1, wherein the plurality of signal processing slices are time interleaved. ### Claim 16 A method of calibrating a signal processing system, the method comprising: processing an input signal to generate an output signal using a shared signal processing channel that has a first error of a first type; processing the output signal from the shared signal processing channel using a plurality of signal processing slices that have a plurality of errors of the first type; compensating the plurality of signal processing slices for the plurality of errors by providing the plurality of signal processing slices with a plurality of slice correction coefficients from a calibration system; and adjusting each of the plurality of slice correction coefficients based on an estimate of the first error using the calibration system. ### Claim 17 (depends on 16) The method of claim 16, further comprising generating estimates of the plurality of errors of the signal processing slices, and subtracting the estimate of the first error from the estimates to generate corrected estimates. ### Claim 18 (depends on 17) The method of claim 17, wherein the calibration system includes a plurality of first accumulators that receive the corrected estimates and generate the plurality of slice correction coefficients. ### Claim 19 (depends on 18) The method of claim 18, wherein the calibration system further includes a second accumulator that generates the estimate of the first error based on an average of the plurality of slice correction coefficients. ### Claim 20 (depends on 16) The method of claim 16, wherein the shared signal processing channel further has a second error of a second type.