Semiconductor devices and methods of manufacturing thereof

A method for fabricating semiconductor devices, comprising:

• forming a first junction field-effect-transistor comprising:
• (a) forming a first gate region extending into a substrate, wherein the first gate region has a first conductive type,
• (b) forming a channel region extending into the substrate and has a lower boundary surrounded by the first gate region, wherein the channel region has a second conductive type, and
• (c) forming a second gate region extending into the substrate and having a lower boundary surrounded by the channel region, wherein the second gate region has the first conductive type,
• wherein the channel region is completely enclosed by the first gate region and the second gate region such that the channel region is buried within the substrate and separated from isolation regions to reduce flicker noise.

A method for fabricating semiconductor devices, comprising:

• forming a first junction field-effect-transistor comprising:
• (a) forming a first gate region extending into a substrate and having at least a vertical portion of a first U-shape, wherein the first gate region has a first conductive type;
• (b) forming a first channel region extending into the substrate and has a lower boundary surrounded by the first gate region, wherein the first channel region has a second conductive type opposite to the first conductive type;
• and
• (c) forming a second gate region extending into the substrate and having a lower boundary surrounded by the first channel region, wherein the second gate region has the first conductive type;
• and
• forming a second junction field-effect-transistor comprising:
• (d) forming a third gate region extending into the substrate, wherein the third gate region has the first conductive type;
• (e) forming a second channel region extending into the substrate and having a lower boundary surrounded by the third gate region, wherein the second gate region has the second conductive type;
• and
• (f) forming a fourth gate region extending into the substrate and having a lower boundary surrounded by the second channel region, wherein the fourth gate region has the first conductive type.