Power gating using nanoelectromechanical systems (nems) in back end of line (beol)
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHung-Li Chiang, Ching-Hui Lin, Chun-Ren Cheng, Iuliana Radu
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Abstract
One aspect of the present disclosure pertains to a device. The device includes a substrate, a logic circuit disposed on the substrate, and a nanoelectromechanical systems (NEMS) device electrically connected to the logic circuit and formed on the substrate. The NEMS device includes a first electrode electrically connected to the logic circuit, a second electrode electrically connected to a first power supply, a movable feature electrically connected to the second electrode, and a control electrode operable to move the movable feature relative to the first electrode.
Claims20
A device, comprising:
- transistor devices in a device layer over a substrate, each transistor device having a channel region between source/drain (S/D) epitaxial features, a gate structure over the channel region, S/D contacts over the S/D epitaxial features, and a gate contact over the gate structure;
- an interconnect structure over the device layer, wherein the interconnect structure includes metal lines and vias that electrically connect to the transistor devices;
- and
- a nanoelectromechanical systems (NEMS) device over the interconnect structure and electrically connected to one or more of the transistor devices, the NEMS device comprises:
- a first electrode electrically connected to the one or more transistor devices through the interconnect structure,
- a second electrode electrically connected to a first power supply,
- a movable feature electrically connected to the second electrode, and
- a control electrode operable to move the movable feature relative to the first electrode by a second power supply.
A device, comprising:
- transistor devices in a device layer over a substrate, each transistor device having a channel region between source/drain (S/D) epitaxial features, a gate structure over the channel region, S/D contacts over the S/D epitaxial features, and a gate contact over the gate structure;
- an interconnect structure over the device layer, wherein the interconnect structure includes metal lines and vias that electrically connect to the transistor devices;
- and
- a nanoelectromechanical systems (NEMS) device under the transistor devices on a backside of the substrate and electrically connected to one or more of the transistor devices, the NEMS device comprises:
- a first electrode electrically connected to the one or more transistor devices through a backside via penetrating through the substrate,
- a second electrode electrically connected to a first power supply,
- a movable feature electrically connected to the second electrode, and
- a control electrode operable to move the movable feature relative to the first electrode by a second power supply.
A device, comprising:
- a substrate;
- a logic circuit disposed on the substrate;
- and
- a vertical nanoelectromechanical systems (NEMS) device on the substrate and electrically coupled to the logic circuit, the vertical NEMS device comprises:
- a first electrode directly above and landing on a metal via of the logic circuit,
- a second electrode adjacent the logic circuit and over the substrate, the second electrode is electrically connected to a power supply VDD,
- a vertical metal beam landing on a top surface of the second electrode, and
- a control electrode above the logic circuit and under the first electrode, wherein when the control electrode is applied with a control voltage, the vertical metal beam bends towards the control electrode until the vertical metal beam contacts the first electrode.
Dependencies are inferred from the claim text.