Hardware randomized boot clock

A digital electronic device comprising:

• a random number generator circuit configured to generate random values;
• a reference clock circuit configured to generate a reference clock signal comprising a series of intervals that each have N clock pulses, N being a natural number greater than one;
• a clock gate circuit operatively coupled to both the random number generator circuit and the reference clock circuit, the clock gate circuit being configured to switch off at least one clock pulse in each interval of the series of intervals to generate a randomized clock signal at a root node of a clock network, the at least one clock pulse switched off in each interval being randomized by the random values from the random number generator circuit;
• a boot core circuit operatively coupled to the clock gate circuit and configured to access an internal memory comprising boot instructions using the randomized clock signal;
• at least one peripheral operatively coupled to the clock gate circuit;
• and
• at least one processor operatively coupled to the clock gate circuit, wherein the at least one peripheral or the at least one processor are clocked using the randomized clock signal from the clock gate circuit.

A method of securely booting a digital electronic device, the method comprising:

• generating a reference clock signal comprising a series of intervals that each have N clock pulses, N being a natural number greater than one;
• generating a randomized clock signal using the reference clock signal by, for each interval of the series of intervals,
• generating K random values each corresponding to a clock pulse of the interval using a hardware random number generator circuit, K being a natural number less than or equal to N,
• switching off each clock pulse of the interval that the corresponds to one of the K random values using a hardware clock gate circuit, and
• outputting the remaining clock pulses of the interval as the randomized clock signal;
• and
• executing boot instructions using a boot core circuit clocked by the randomized clock signal.