Method for end-of-computation flag generation in a pulse generation circuit for an in-memory computing system

A computing device for an in-memory computing memory, the computing device comprising a set of in-memory computing counters, the computing device being configured to perform operations comprising:

• receive by the set of in-memory computing counters a set of input neuron data sets through a set of input data lines;
• set an end-of-computation signal to a first end-of-computation signal value once an in-memory computing clock signal changes from a first signal value to a second signal value;
• register by the set of in-memory computing counters the set of input neuron data sets, a respective in-memory computing counter registering a respective input neuron data set received through a respective input data line during a respective time window;
• initialise by the set of in-memory computing counters a set of internal counters with the set of input neuron data sets, a respective internal counter being initialised with the respective input neuron data set;
• set the value of a respective flag signal of the respective in-memory computing counter to a first flag value if the value of the respective internal counter deviates from a first counter value, and increasing or decreasing the value of the respective internal counter during an adjustment cycle until the value of the respective internal counter equals the first counter value, and generating a respective set of signal pulses during the adjustment cycle to be fed to a memory array, the number of signal pulses generated during the adjustment cycle by the respective in-memory computing counter being proportional to the magnitude of the respective input neuron data set received by the respective in-memory computing counter during the respective time window;
• set the value of the respective flag signal of the respective in-memory computing counter to a second flag value if the value of the respective internal counter equals the first counter value;
• and
• set the end-of-computation signal to a second end-of-computation signal value if the values of the flag signals of all the in-memory computing counters of the in-memory computing driver equal the second flag value.