Mems structure with reduced peeling and methods forming the same

A method comprising:

• forming an interconnect structure over a substrate, wherein the substrate is comprised in a wafer, and wherein the interconnect structure comprises a plurality of dielectric layers;
• forming a plurality of metal pads over the interconnect structure, wherein the plurality of metal pads are electrically connected to the interconnect structure;
• performing a first etching process to form top portions of a plurality of through-holes that penetrate through the wafer;
• and
• performing a second etching process to form middle portions of the plurality of through-holes, wherein the middle portions are underlying and joining to the top portions, and wherein the middle portions are wider than respective ones of the top portions;
• and
• from a front side of the wafer, depositing a first metal layer.

A method comprising:

• forming a plurality of dielectric layers over a semiconductor substrate;
• forming a plurality of through-holes penetrating through the plurality of dielectric layers and the semiconductor substrate, wherein one of the plurality of through-holes comprises:
• a first portion;
• and
• a second portion at a different level than the first portion, wherein the first portion and the second portion collectively form a step, and the second portion is wider than the first portion;
• and
• forming a first metal layer comprising a part extending into the plurality of through-holes.