Method for manufacturing a plurality of semiconductor chips and semiconductor chip

A method for manufacturing a plurality of semiconductor chips, the method comprising:

• providing an epitaxial semiconductor layer sequence having a plurality of epitaxial semiconductor layer stacks, the epitaxial semiconductor layer stacks having active regions configured for generating electromagnetic radiation;
• applying a plurality of logical chips on or over the epitaxial semiconductor layer sequence, the logical chips comprising at least one integrated circuit configured for controlling the active regions, wherein the logical chips are at least partially provided separately from each other, and wherein the logical chips are CMOS chips, the CMOS chips comprising at least one p-channel MOSFET and at least one n-channel MOSFET being part of the at least one integrated circuit;
• and
• embedding the plurality of logical chips in a mold compound.

A semiconductor chip comprising:

• an epitaxial semiconductor layer stack having an active region configured for generating electromagnetic radiation;
• and
• a logical chip comprising at least one integrated circuit configured to control the active region,
• wherein the logical chip is laterally at least partially embedded in a mold compound,
• wherein the epitaxial semiconductor layer stack has at least two pixel regions comprising parts of the active region,
• wherein bumps are electrically conductively connecting the pixel regions with the logical chip,
• wherein the logical chip controls the parts of the active regions of the pixel regions independently from each other, and
• wherein the epitaxial semiconductor layer stack and the logical chip are arranged offset to each other such that an electrical contact pad of the logical chip is freely accessible.