Microelectronic devices with pillars extending through upper and lower tiered stack structures and an intermediate dielectric region

A microelectronic device, comprising:

• a lower tiered stack comprising a vertically repeated pattern of conductive structures and insulative structures;
• an upper tiered stack above the lower tiered stack, the upper tiered stack comprising an additional vertically repeated pattern of additional conductive structures and additional insulative structures;
• a dielectric region vertically interposed between the lower tiered stack and the upper tiered stack;
• and
• pillars extending through the upper tiered stack, the dielectric region, and the lower tiered stack, the pillars individually comprising:
• a lower channel region extending through elevations of the lower tiered stack and into elevations of the dielectric region;
• and
• an upper channel region extending through elevations of the upper tiered stack and into other elevations of the dielectric region,
• sidewalls of the lower channel region being horizontally offset from sidewalls of the upper channel region.

A microelectronic device, comprising:

• a tiered stack comprising:
• a lower tiered structure comprising conductive structures and insulative structures arranged in tiers vertically repeated through the lower tiered stack portion, the tiers individually comprising at least one of the insulative structures and at least one of the conductive structures;
• an upper tiered structure comprising additional conductive structures and additional insulative structures arranged in additional tiers vertically repeated through the upper tiered stack portion;
• and
• a dielectric region between the lower tiered structure and the upper tiered structure;
• slit structures extending through the tiered stack to divide the tiered stack into blocks;
• and
• within an individual of the blocks, pillars extend through the tiered stack, the pillars individually comprising:
• a lower pillar portion extending through the lower tiered structure and into the dielectric region, the lower pillar portion comprising a lower channel region;
• and
• an upper pillar portion extending through the upper tiered structure and into the dielectric region, the upper pillar portion comprising an upper channel region,
• within elevations of the dielectric region:
• the lower channel region abutting the upper channel region;
• and
• the upper channel region comprising a horizontal extension.