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US 2025/0351346 A1Published application
Non-volatile memory cell with single poly floating gate and contact control gate
AssigneeSTMicroelectronics International N.V.
InventorsRoberto BREGOLI, Alberto LANZI, Fausto CARACE, Laura ATZENI
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Abstract
A cost-effective solution to implement a non-volatile memory cell based on floating gate transistor including a floating gate that overlies an active region and a field region of a semiconductor substrate: Single Poly Floating Gate NVM bitcell. The control gate terminal is implemented with contact plug/s (Contact Control Gate) or metal field plate separated by the floating gate using commonly present in CMOS process SIPROT stack (oxide(s) and nitride(s)).
Claims21
A memory device, comprising:
- a semiconductor substrate including an active region and a field region;
- a floating gate;
- a control gate above the floating gate;
- and
- a dielectric layer interposed between the control gate and the floating gate, wherein the control gate is made at least in part of a metallic material.
2 more elements
A memory device, comprising:
- a semiconductor substrate including an active region and a field region;
- a floating gate;
- a control gate above the floating gate;
- and
- a dielectric layer interposed between the control gate and the floating gate, wherein the control gate includes a plurality of discrete elements.
2 more elements
A memory device, comprising:
- a semiconductor substrate including an active region and a field region;
- a floating gate overlying the active region and the field region;
- a control gate arranged above the floating gate;
- and
- a dielectric layer interposed between the control gate and the floating gate, wherein the control gate overlays the field region without overlapping the active region.
2 more elements
21-29. (canceled)
Dependencies are inferred from the claim text.