Semiconductor package

A semiconductor package comprising:

• a substrate that comprises lower pads and an interconnection layer electrically connected to the lower pads;
• at least one chip structure that is on the substrate and is electrically connected to the interconnection layer;
• and
• core balls on respective ones of the lower pads of the substrate,
• wherein the core balls are electrically connected to the at least one chip structure through the interconnection layer,
• wherein each of at least one core ball of the core balls comprises a core body and a conductive material layer that at least partially surrounds the core body,
• wherein the core body comprises an external surface and an internal surface that define a through-hole extending from a first side of the external surface to a second side of the external surface, and
• wherein the conductive material layer extends along the external surface and the internal surface of the core body.

A semiconductor package comprising:

• a substrate that comprises lower pads and an interconnection layer electrically connected to the lower pads;
• at least one chip structure that is on the substrate and is electrically connected to the interconnection layer;
• and
• a plurality of external connection bumps respectively on the lower pads,
• wherein the plurality of external connection bumps comprise core balls and conductive bumps,
• wherein the core balls comprise a core body and a conductive material layer that at least partially surrounds a surface of the core body,
• wherein a first core ball of the core balls and a second core ball of the core balls are spaced apart from each other by a first distance in a direction that is parallel to a lower surface of the substrate,
• wherein the first core ball and a first conductive bump of the conductive bumps are spaced apart from each other by a second distance in the direction, and
• wherein the second distance is less than the first distance.