Semiconductor chip package having underfill material surrounding a fan-out package and contacting a stress buffer structure sidewall
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsPo-Chen Lai, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng, Shu-Shen Yeh
Life of this patent
Estimating the term…
Abstract
A fan-out package includes at least one semiconductor die attached to an interposer structure, a molding compound die frame laterally surrounding the at least one semiconductor die and including a molding compound material, and at least one stress buffer structure located on the interposer structure and including a stress buffer material having a first Young's modulus. The molding compound die frame includes a molding compound material having a second Young's modulus that is greater than the first Young's modulus.
Claims20
A method of forming a chip package structure, comprising:
- providing an interposer structure;
- forming at least one stress buffer structure on the interposer structure;
- attaching at least one semiconductor die to the interposer structure, wherein the at least one stress buffer structure is located outside an area including the at least one semiconductor die in a plan view;
- and
- forming a molding compound die frame comprising a molding compound material around the at least one semiconductor die and on the at least one stress buffer structure.
A method of forming a chip package structure, comprising:
- forming at least one stress buffer structure comprising a stress buffer material having a first Young's modulus on an interposer structure;
- attaching at least one semiconductor die to the interposer structure via an array of first solder material portions;
- forming a molding compound die frame comprising a molding compound material having a second Young's modulus that is greater than the first Young's modulus around the at least one semiconductor die, whereby a fan-out package is formed;
- attaching a packaging substrate to the fan-out package via an array of second solder material portions.
A method of forming a chip package structure, comprising:
- forming an array of stress buffer structures comprising a stress buffer material having a first Young's modulus on an array of interposer structures;
- attaching an array of semiconductor dies to the array of interposer structures employing first solder material portions;
- forming a molding compound matrix comprising a molding compound material having a second Young's modulus that is greater than the first Young's modulus around the array of semiconductor dies;
- and
- dicing a combination of the molding compound matrix, the array of semiconductor dies, and the array of interposer structures by performing a dicing process, whereby a plurality of fan-out packages is formed.
Dependencies are inferred from the claim text.