Radio-frequency Power Detector with Transimpedance Amplifier and Input Offset Mitigation
AssigneeApple Inc.
InventorMohamed Abouzied
Life of this patent
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Abstract
Wireless circuitry is provided that includes a radio-frequency amplifier or mixer, a power detector coupled to an input or an output of the radio-frequency amplifier or mixer, and a transimpedance amplifier coupled to an output of the power detector. The transimpedance amplifier can be implemented as a class A amplifier, a class AB amplifier, or an enhanced class AB amplifier. The power detector can include an input transistor having a gate terminal configured to receive a radio-frequency signal, a bias transistor, and a voltage generator configured to apply a calibration voltage to a gate terminal of the bias transistor to mitigate a direct current (DC) offset associated with the power detector.
Claims20
Power detection circuitry comprising:
- an input transistor having a gate terminal configured to receive an alternating current (AC) signal and having a first source-drain terminal coupled to a first output port;
- a bias transistor having a gate terminal and having a first source-drain terminal coupled to a second output port;
- and
- a voltage generator having an input coupled to the gate terminal of the input transistor and having an output coupled to the gate terminal of the bias transistor.
Power detection circuitry comprising:
- an input transistor having a gate terminal configured to receive an alternating current (AC) signal;
- a bias transistor having a gate terminal;
- a voltage generator coupled to the gate terminal of the input transistor and configured to produce a voltage to the gate terminal of the bias transistor;
- and
- a controller configured to output a code for controlling the voltage generator, wherein the controller is further configured to dynamically adjust the code based on a temperature value.
Power detection circuitry comprising:
- an input transistor having a gate terminal configured to receive an alternating current (AC) signal;
- a bias transistor having a gate terminal;
- and
- a voltage generator coupled to the gate terminal of the input transistor and configured to output a voltage to the gate terminal of the bias transistor for mitigating a direct current (DC) offset of the power detection circuitry.
Dependencies are inferred from the claim text.