One-time programmable memory cell
AssigneeSTMicroelectronics International N.V.
InventorStephane DENORME
Life of this patent
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Abstract
A one-time programmable memory cell includes a programming element, a first transistor connected between a first selection node and an intermediate node, and a second transistor connected between the intermediate node and a first electrode of the programming element. A second electrode of the programming element is coupled to a programming voltage rail. The first transistor has a first width and the second transistor has a second width smaller than the first width.
Claims23
A one-time programmable memory cell, comprising:
- a programming element;
- a first transistor connected between a first selection node and an intermediate node;
- and
- a second transistor connected between the intermediate node and a first electrode of the programming element;
- wherein a second electrode of the programming element is coupled to a programming voltage rail;
- and
- wherein the first transistor has a first width, the second transistor has a second width smaller than the first width, and the programming element has a third width;
- and
- wherein a sum of the second width and the third width is less than the first width.
A memory array, comprising:
- a plurality of memory cells including a first memory cell and a second memory cell;
- wherein each memory cell of the plurality of memory cells comprises:
- a programming element;
- a first transistor connected between a first selection node and an intermediate node;
- and
- a second transistor connected between the intermediate node and a first electrode of the programming element;
- wherein a second electrode of the programming element is coupled to a programming voltage rail;
- and
- wherein the first transistor has a first width and the second transistor has a second width smaller than the first width;
- and
- wherein the second electrode of the programming element of the first and second memory cells is formed by a single continuous conductor.
A method of manufacturing a one-time programmable memory cell, comprising:
- forming a programming element;
- forming a first transistor connected between a first selection node and an intermediate node, the first transistor having a first width;
- forming a second transistor connected between the intermediate node and a first electrode of the programming element, the second transistor having a second width smaller than the first width;
- and
- wherein a second electrode of the programming element is coupled to a programming voltage rail;
- wherein the programming element has a third width;
- and
- wherein a sum of the second width and the third width is less than the first width.
Dependencies are inferred from the claim text.