Manufacturing method of an electronic chip including a memory circuit

A method of manufacturing an electronic chip including a memory circuit, the method comprising:

• forming selection transistors in a semiconductor substrate;
• forming an interconnection stack, arranged on the semiconductor substrate, including a succession of levels, each level including an alternation of first insulating layers and of second insulating layers having interconnection elements defined therein;
• and
• forming a plurality of memory cells arranged above the interconnection stack, each memory cell being electrically coupled to a selection transistor via a first conductive via running through the entire thickness of the interconnection stack.

A method, comprising:

• forming a plurality of selection transistors;
• forming a first pair of dielectric layers above the selection transistors;
• forming a second pair of dielectric layers above the first pair of dielectric layers;
• forming a metal interconnect structure extending through the first and second pairs of dielectric layers and electrically coupled to a first selection transistor of the plurality of selection transistors;
• forming, after forming the metal interconnect structure, a first conductive via extending through the first and second pairs of dielectric layers and electrically coupled to a second selection transistor of the plurality of selection transistors;
• and
• forming a first memory cell on the conductive via.