# US 2025/0219585 A1 · Broadband sliding-mode outphasing power amplifier with high efficiency > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2025/0219585 A1 - Document ID: US20250219585A1 - Status: Published application - Kind: A1 - Application number: 17/823,573 - Filed: 2022-08-31 - Published: 2025-07-03 - Earliest claimed: 2021-08-31 - Assignees: Ohio State Innovation Foundation - Applicants: Ohio State Innovation Foundation - Inventors: Patrick Roblin; Dominic Mikrut - Web page: https://patentgrep.com/patent/US20250219585A1 ## CPC - H03F 1/0288: {using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers} - H03F 3/211: {using a combination of several amplifiers (H03F3/60 takes precedence)} - H03F 3/602: {Combinations of several amplifiers} - H03F 2200/451: the amplifier being a radio frequency amplifier - H03F: AMPLIFIERS ## Abstract A dual-input microwave power amplifier (PA) with high-efficiency. The PA exploits the continuum of modes between the Doherty and Chireix PA mode of operation to achieve 40% fractional bandwidth while relying on the physical linear dispersion of the transmission lines of the lossless output combiner. A constant output is achieved at peak power over the entire bandwidth. The output backoff varies from 6 dB in the Doherty mode to 8 dB in the Chireix mode. The PA operates over a wider range of frequencies from 1 to 8 GHz. The dual-input PA operates in mixed-mode and thus requires variable input power drives and outphasing angle. ## Claims ### Claim 1 A dual transistor power amplifier (PA), comprising: a main branch transmission line (TL1) having a main transistor; an auxiliary branch transmission line (TL2) having an auxiliary transistor; a common load (RL) to which the main branch transmission line and the auxiliary branch transmission line are connected, wherein the dual transistor PA provides a sliding mode on the Chireix-Doherty continuum by mapping an electrical length of the main branch transmission TL1 and an electrical length the auxiliary branch transmission TL2 across a targeted frequency band of operation with an outphasing angle. ### Claim 2 (depends on 1) The power amplifier of claim 1, wherein the electrical length is determined with the following relationship: Θ 1 / 2 = Θ O ( 1 , 2 ) ⁢ ω ω o , and wherein Θ O 1 = π 2 , ΘO1=π, and ω=2πf where f the maximum frequency in the desired operating frequency range. ### Claim 3 (depends on 2) The power amplifier of claim 2, wherein the power amplifier operates in a Doherty mode of operation with 6 dB of output back-off (OBO) power at a maximum frequency when the outphasing angle between the two inputs is equal to 90° which occurs when ω=ω0. ### Claim 4 (depends on 3) The power amplifier of claim 3, wherein, as the frequency of operation deviates from ω0, the mode operation gradually changes from the Doherty mode of operation to a Chireix mode of operation with 8 dB of OBO power at the minimum frequency. ### Claim 5 (depends on 4) The power of amplifier of claim 4, wherein the OBO varies from 6 dB in the Doherty mode to 8 dB in the Chireix mode. ### Claim 6 (depends on 1) The power amplifier of claim 1, wherein the power amplifier provides 40% fractional bandwidth while relying on a physical linear dispersion of transmission lines of a lossless output combiner. ### Claim 7 (depends on 1) The power amplifier of claim 1, wherein the power amplifier provides a constant output at peak power over the entire bandwidth. ### Claim 8 (depends on 1) The power amplifier of claim 1, wherein the design of the matching networks is established at a current-source reference plane (CSRP). ### Claim 9 (depends on 1) The power amplifier of claim 1, wherein the common load maintains a predetermined impedance for the main transistor and the auxiliary transistor while an output power of the power amplifier varies from a peak output power to a back-off output (OBO) power. ### Claim 10 (depends on 9) The power amplifier of claim 9, wherein the common load provides a DC drain biasing for the power amplifier. ### Claim 11 A method providing a sliding mode on the Chireix-Doherty continuum in a dual transistor power amplifier (PA) having a main branch transmission line (TL1) having a main transistor, an auxiliary branch transmission line (TL2) having an auxiliary transistor, and a common load (RL) to which the mail branch transmission line and the auxiliary branch transmission line are connected, comprising: mapping an electrical length of the main branch transmission TL1 and an electrical length the auxiliary branch transmission TL2 across a targeted frequency band of operation with an outphasing angle. ### Claim 12 (depends on 11) The method of claim 11, further comprising: determining the electrical length of transmission lines according to: Θ 1 / 2 = Θ O ( 1 , 2 ) ⁢ ω ω o , and wherein Θ O 1 = π 2 , ΘO1=π, and ω=2πf where f the maximum frequency in the desired operating frequency range. ### Claim 13 (depends on 12) The method of claim 12, further comprising operating the power amplifier operates in a Doherty mode of operation with 6 dB of output back-off (OBO) power at a maximum frequency when the outphasing angle between the two inputs is equal to 90° which occurs when ω=ω0. ### Claim 14 (depends on 3) The method of claim 3, further comprising: varying a frequency of operation from ωo; and changing the mode operation from the Doherty mode of operation to a Chireix mode of operation with 8 dB of OBO power at the minimum frequency. ### Claim 15 (depends on 14) The method of claim 14, wherein the OBO varies from 6 dB in the Doherty mode to 8 dB in the Chireix mode. ### Claim 16 (depends on 11) The method of claim 11, further comprising providing 40% fractional bandwidth while relying on a physical linear dispersion of transmission lines of a lossless output combiner. ### Claim 17 (depends on 11) The method of claim 11, further comprising providing a constant output at peak power over the entire bandwidth. ### Claim 18 (depends on 11) The method of claim 11, wherein the design of the matching networks is established at a current-source reference plane (CSRP). ### Claim 19 (depends on 11) The method of claim 11, further comprising: maintaining a predetermined impedance at the common load for the main transistor and the auxiliary transistor as an output power of the power amplifier varies from a peak output power to a back-off output (OBO) power. ### Claim 20 (depends on 19) The method of claim 19, further comprising providing, by the common load, a DC drain bias for the power amplifier.