US 2025/0212401 A1 · SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FORMING THE SAME

Abstract

A semiconductor memory device is provided. The semiconductor memory device includes a semiconductor substrate and transistor structures. The transistor structures are disposed on the semiconductor substrate. Each of the transistor structures includes a semiconductor layer, a floating gate, a control gate, a tunneling oxide layer, and an inter-gate dielectric layer. The semiconductor substrate and the semiconductor layer have the same conductivity type and different doping concentrations. The floating gate covers a sidewall of the semiconductor layer and has a curved sidewall opposite the sidewall of the semiconductor layer. The tunneling oxide layer is between the floating gate and the semiconductor substrate and between the first floating gate and the semiconductor layer. A control gate is disposed on the floating gate and an inter-gate dielectric layer is between the control gate and the floating gate and conformally covers the curved sidewall of the first floating gate.

Claims15

Dependent claims

A semiconductor memory device, comprising:

a semiconductor substrate having a first doping concentration with a first conductivity type;
and
a plurality of transistor structures disposed on the semiconductor substrate, each of the transistor structures comprising:
a semiconductor layer having a second doping concentration with the first conductivity type, wherein the second doping concentration is different than the first doping concentration;
a first floating gate covering a first sidewall of the semiconductor layer and having a curved sidewall opposite to the first sidewall;
a first tunnel oxide layer formed between the first floating gate and the semiconductor substrate, and between the first floating gate and the semiconductor layer;
a first control gate disposed on the first floating gate;
and
an inter-gate dielectric layer formed between the first control gate and the first floating gate and conformably covering the curved sidewall of the first floating gate.

6 more elements

A method for forming a semiconductor memory device, comprising:

forming at least one semiconductor layer on a semiconductor substrate, wherein the semiconductor substrate has a first P-type doping concentration and the semiconductor layer has a second P-type doping concentration, and the second P-type doping concentration is different than the first P-type doping concentration;
conformally forming a first dielectric layer to cover an upper surface of the semiconductor substrate and cover an upper surface, a first sidewall and an opposing second sidewall of the semiconductor layer;
forming a first floating gate and a second floating gate on the first dielectric layer and covering the first sidewall and the second sidewall, respectively, wherein the first floating gate has a curved sidewall opposite to the first sidewall and the second floating gate has a curved sidewall opposite to the second sidewall;
conformally forming a second dielectric layer to cover the upper surface of the semiconductor substrate, the upper surface of the semiconductor layer, the curved sidewall of the first floating gate and the curved sidewall of the second floating gate;
and
forming a first control gate to cover the second dielectric layer on the first floating gate and forming a second control gate to cover the second dielectric layer on the second floating gate.

3 more elements

Dependencies are inferred from the claim text.

Semiconductor memory device and method for forming the same

Life of this patent

Semiconductor memory device and method for forming the same

Life of this patent

Abstract

Claims15