Molded vertical interconnect array

An integrated device package comprising:

• a substrate;
• and
• one or more vertical interconnect arrays comprising a plurality of vertical interconnects in an array and a molding compound encapsulating the plurality of vertical interconnects, wherein the molding compound at a first end and a second end of the one or more vertical interconnect arrays comprise a planar surface, and wherein a first end of the plurality of vertical interconnects is substantially co-planar with the molding compound at the first end of the plurality of vertical interconnects and a second end of the plurality of vertical interconnects is substantially co-planar with the molding compound at the second end of the plurality of vertical interconnects;
• wherein the first end of the one or more vertical interconnect arrays is physically and electrically connected to a first side of the substrate, the one or more vertical interconnect arrays extending outwardly from the substrate.

An integrated device package comprising:

• one or more vertical interconnect arrays comprising a plurality of vertical interconnects in an array and a molding compound encapsulating the plurality of vertical interconnects, wherein the molding compound at a first end and a second end of the one or more vertical interconnect arrays comprise a planar surface, and wherein a first end of the plurality of vertical interconnects is substantially co-planar with the molding compound at the first end of the plurality of vertical interconnects and a second end of the plurality of vertical interconnects is substantially co-planar with the molding compound at the second end of the plurality of vertical interconnects arrays;
• a first substrate, wherein the first end of the one or more vertical interconnect arrays is physically and electrically connected to a first side of the substrate;
• a second substrate, wherein the second end of the one or more vertical interconnect arrays is physically and electrically connected to a first side of the second substrate;
• and
• a seam between each of the one or more vertical interconnect arrays connected to the first and second substrate;
• wherein the one or more vertical interconnect arrays are disposed between the first and second substrates.

A method of forming an electronic module, the method comprising:

• arranging a plurality of vertical interconnects in an array;
• encapsulating the plurality of vertical interconnects in a molding compound, wherein a first end and a second end of the plurality of vertical interconnects protrude through the molding compound;
• and
• after the encapsulating, singulating the encapsulated plurality of vertical interconnects in an array into a plurality of vertical interconnect arrays.