Codec system and its encoding circuit and decoding circuit

An encoding circuit, comprising:

• a minimum change code generation circuit configured to generate a digital code;
• and
• a flag generation circuit coupled to the minimum change code generation circuit and configured to generate a flag based on the digital code;
• wherein the digital code corresponds to an output value, the output value is one of a periodic sequence, a period of the periodic sequence comprises N values, an Rth value of a first period of the periodic sequence and an (N−R+1)th value of a second period of the periodic sequence correspond to a same digital code, the first period and the second period are consecutive periods, the flag is a first value in the first period, the flag is a second value in the second period, the first value is not equal to the second value, and R is greater than or equal to one and less than or equal to N.

A decoding circuit, wherein the decoding circuit receives a digital code and a flag and decodes the digital code and the flag to generate an output value, the decoding circuit comprising:

• a minimum change code-to-binary code conversion circuit configured to convert the digital code into a binary code;
• a subtraction circuit coupled to the minimum change code-to-binary code conversion circuit and configured to subtract the binary code from a preset value to generate a difference;
• and
• a selection circuit coupled to the minimum change code-to-binary code conversion circuit and the subtraction circuit and configured to receive the binary code and the difference, and to output the binary code or the difference as the output value according to the flag.