Data retention circuit and method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKai-Chi HUANG, Yung-Chen CHIEN, Chi-Lin LIU, Wei-Hsiang MA, Jerry Chang Jui KAO, Shang-Chih HSIEH, Lee-Chung LU
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Abstract
A data retention circuit includes a flip-flop circuit including a master latch coupled to a slave latch, wherein the slave latch includes a first input terminal and a first output terminal, and a series combination of a retention latch and a level shifter coupled between the first input terminal and the first output terminal. The slave latch is configured to be selectively coupled to the series combination through a first transmission gate responsive to a restore signal.
Claims20
A data retention circuit comprising:
- a flip-flop circuit comprising a master latch coupled to a slave latch, wherein the slave latch comprises a first input terminal and a first output terminal;
- and
- a series combination of a retention latch and a level shifter coupled between the first input terminal and the first output terminal,
- wherein the slave latch is configured to be selectively coupled to the series combination through a first transmission gate responsive to a restore signal.
A data retention circuit comprising:
- a flip-flop circuit comprising a master latch coupled to a slave latch, wherein the slave latch comprises:
- an input terminal;
- an output terminal;
- a first inverter coupled between the input terminal and the output terminal;
- and
- a second inverter;
- and
- a series combination of a retention latch and a level shifter coupled between the input terminal and the output terminal,
- wherein, responsive to a restore signal, the slave latch is configured to either
- be coupled to the series combination through a first transmission gate, or
- cross-couple the second inverter with the first inverter through a second transmission gate.
A method of operating a data retention circuit, the method comprising:
- receiving a restore signal at a first transmission gate of the data retention circuit;
- and
- in response to the restore signal, selectively coupling a series combination of a retention latch and a level shifter to a slave latch further coupled to a master latch,
- wherein
- the slave latch comprises an input terminal and an output terminal;
- and
- the series combination of the retention latch and the level shifter is coupled between the input terminal and the output terminal.
Dependencies are inferred from the claim text.