Differential current buffer circuit and dc and alternating current source comprising the same
AssigneeIt'is Foundation
InventorMyles CAPSTICK
Life of this patent
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AssigneeIt'is Foundation
InventorMyles CAPSTICK
Estimating the term…
A differential current buffer circuit comprises a differential input stage supplied from a first positive and a first negative supply voltage. The input stage has a first input circuit connected between first current paths of a first current and a second mirror connected between second positive and negative supply voltages. A second input circuit is connected between first current paths of a third and a fourth current mirror connected between the second positive and negative supply voltages. The second positive voltage is higher than the first positive supply voltage, and the second negative voltage is lower than the first negative supply voltage. A first and a second output of the differential current buffer circuit are tapped off between the respective second current paths of the first and second current mirrors and the respective second current paths of the third and fourth current mirrors, respectively.
Differential current buffer circuit (100) comprising a differential input stage (300) that is powered from a first positive supply voltage (+V1) and a first negative supply voltage (−V1), wherein the differential input stage (300) has a first input circuit whose outputs are connected between a first current path (318) of a first output current mirror connected to a second positive supply voltage (+V2) and a first current path (322) of a second mirror connected to a second negative supply voltage (−V2), and a second input circuit whose outputs are connected between a first current path (310) of a third output current mirror connected to the second positive supply voltage (+V2) and a first current path (314) of a fourth output current mirror connected to the second negative supply voltage (−V2), wherein, referred to a reference potential, the second positive supply voltage (+V2) is higher than the first positive supply voltage (+V1) and the second negative supply voltage (−V2) is lower than the first negative supply voltage (−V1), and wherein a first output (O1) of the differential current buffer circuit (100) is tapped off between the respective second current paths (320, 324) of the first and second output current mirrors, and wherein a second output (O2) of the differential current buffer circuit (100) is tapped off between the respective second current paths (312, 316) of the third and fourth output current mirrors.
Dependencies are inferred from the claim text.