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US 2025/0169151 A1Published application
Semiconductor triode
AssigneeSTMicroelectronics (Tours) SAS
InventorSamuel MENARD
Life of this patent
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Abstract
A vertical semiconductor triode includes a first layer of semiconductor material, the first layer including first and second surfaces, the first surface being in contact with a first electrode forming a Schottky contact.
Claims20
An electronic device, comprising:
- a first thyristor and a second thyristor adjacent to the first thyristor;
- wherein the first thyristor and the second thyristor commonly shares:
- a first semiconductor layer having a first surface and a second surface opposite to the first surface, the first semiconductor layer having a first conductivity type with a first concentration;
- a second semiconductor layer on the first surface of the first semiconductor layer, the second semiconductor layer having a second conductivity type;
- and
- a third semiconductor layer on the second surface of the first semiconductor layer, the third semiconductor layer having the second conductivity type, the third semiconductor layer having a third surface facing away from the first semiconductor layer,
- wherein the first thyristor further includes:
- a first metal layer on the third surface of the third semiconductor layer;
- a second metal layer on the third surface of the third semiconductor layer, the second metal layer spaced apart from the first metal layer;
- and
- a first region within the third semiconductor layer, the first region being heavily doped with the second conductivity type than the rest of the third semiconductor layer,
- wherein the first metal layer and the first region overlap with each other from a plan view.
9 more elements
An electronic device, comprising:
- a first thyristor and a second thyristor adjacent to the first thyristor;
- wherein the first thyristor and the second thyristor both include:
- a first semiconductor layer having a first surface and a second surface opposite to the first surface, the first semiconductor layer having a first conductivity type with a first concentration;
- a second semiconductor layer on the first surface of the first semiconductor layer, the second semiconductor layer having a second conductivity type;
- a third semiconductor layer on the second surface of the first semiconductor layer, the third semiconductor layer having the second conductivity type, the third semiconductor layer having a third surface facing away from the first semiconductor layer;
- and
- a first metal layer on the third surface of the third semiconductor layer, the first meta layer extending continuously and contiguously from the second thyristor to the first thyristor,
- wherein the first thyristor further includes:
- a second metal layer on the third surface of the third semiconductor layer, the second metal layer spaced apart from the first metal layer;
- and
- a first region within the third semiconductor layer, the first region being heavily doped with the second conductivity type than the rest of the third semiconductor layer,
- wherein the second metal layer and the first region overlap with each other from a plan view.
9 more elements
An electronic device, comprising:
- a first semiconductor layer having a first surface and a second surface opposite to the first surface, the first semiconductor layer having a first conductivity type with a first concentration;
- a second semiconductor layer on the first surface of the first semiconductor layer, the second semiconductor layer having a second conductivity type;
- a third semiconductor layer on the second surface of the first semiconductor layer, the third semiconductor layer having the second conductivity type, the third semiconductor layer having a third surface facing away from the first semiconductor layer;
- a first metal layer on the third surface of the third semiconductor layer,
- a second metal layer on a fourth surface of the second semiconductor layer, the fourth surface of the second semiconductor layer being opposite to the first surface of the first semiconductor layer, and
- a third metal layer on the fourth surface of the second semiconductor layer, the third metal layer being adjacent to and spaced apart from the second metal layer.
3 more elements
Dependencies are inferred from the claim text.