Command-differentiated storage of internally and externally sourced data
AssigneeRambus Inc.
InventorsThomas J. Sheffler, Lawrence Lai, Liang Peng, Bohuslav Rychlik
Life of this patent
Estimating the term…
Abstract
A memory device having a DRAM core and a register stores first data in the register before receiving first and second memory access commands via a command interface and before receiving second data via a data interface. The memory device responds to the first memory access command by writing the first data from the register to the DRAM core and responds to the second memory access command by writing the second data from the data interface to the DRAM core.
Claims21
1-20. (canceled)
A memory control component to control an integrated-circuit dynamic random access memory (DRAM) having a programmable register and a core storage array, the memory control component comprising:
- a first interface;
- and
- control circuitry to output to the DRAM via the first interface:
- a register-write instruction and register data, the register-write instruction instructing the DRAM to store the register data within the programmable register;
- and
- a first command instructing the DRAM to write the register data from the programmable register into the core storage array.
A method of operation within a memory control component having a first interface coupled to an integrated-circuit dynamic random access memory (DRAM), the method comprising:
- outputting a register-write instruction and register data to the DRAM via the first interface, the register-write instruction instructing the DRAM to store the register data within a programmable register of the DRAM;
- and
- outputting a first command to the DRAM via the first interface, the first command instructing the DRAM to write the register data from the programmable register into a core storage array of the DRAM.
A memory control component to control an integrated-circuit dynamic random access memory (DRAM) having a programmable register and a core storage array, the memory control component comprising:
- a first interface;
- and
- means for outputting to the DRAM via the first interface:
- a register-write instruction and register data, the register-write instruction instructing the DRAM to store the register data within the programmable register;
- and
- a first command instructing the DRAM to write the register data from the programmable register into the core storage array.
Dependencies are inferred from the claim text.