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US 2025/0165191 A1Published application
Interface read after write
AssigneeMicron Technology, Inc.
InventorYue Chan
Life of this patent
Estimating the term…
Abstract
An interface of a memory sub-system can receive a write command addressed to a first address and a read command addressed to a second address and can receive data corresponding to the write command. The interface can determine whether the first address matches the second address responsive to determining that the first address matches the second address, can drop the read command and the second address, and can provide the data to a host.
Claims21
1-20. (canceled)
A memory sub-system comprising:
- a memory device;
- and
- an interface of the memory sub-system comprising a comparator, wherein the interface is coupled to a cache controller;
- wherein the comparator is configured to:
- determine whether a read-after-write dependence exists;
- responsive to determining that the read-after-write dependence exists, identify a write identifier (ID) and a read ID associated with the read-after-write dependence, wherein the write ID corresponds to a write command having an address to the memory device;
- access write data from a write buffer of the interface utilizing the write ID;
- store the write data having the write ID as read data to a read buffer of the interface utilizing the read ID;
- and
- provide the read data to a host from the read buffer of the interface.
7 more elements
A memory sub-system comprising:
- a memory device;
- a cache controller;
- and
- an interface of the memory sub-system comprising:
- a comparator;
- and
- error memory;
- wherein the interface is coupled to the cache controller;
- wherein the comparator is configured to:
- determine whether a read-after-write dependence exists utilizing the error memory of the interface;
- responsive to determining that the read-after-write dependence exists, identify a write identifier (ID) and a read ID associated with the read-after-write dependence, wherein the write ID corresponds to a write command having an address to the memory device;
- access write data from a write buffer of the interface utilizing the write ID;
- store the write data having the write ID as read data to a read buffer of the interface utilizing the read ID;
- and
- provide the read data to a host from the read buffer of the interface.
12 more elements
A method comprising:
- determining, by a comparator of an interface of a memory sub-system, whether a read-after-write dependence exists utilizing an error correction code (ECC) of the interface;
- responsive to determining that the read-after-write dependence exists, identifying, by the comparator, a write identifier (ID) and a read ID associated with the read-after-write dependence, wherein the write ID corresponds to a write command having an address to the memory device;
- accessing, by the comparator, write data from a write buffer of the interface utilizing the write ID;
- storing, by the comparator, the write data having the write ID as read data to a read buffer of the interface utilizing the read ID;
- and
- providing the read data to a host from the read buffer of the interface.
3 more elements
Dependencies are inferred from the claim text.