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US 2025/0159862 A1Published application
Heterostructure oxide semiconductor vertical gate-all-around (vgaa) transistor and methods for making the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsGerben DOORNBOS, Blandine DURIEZ, Marcus Johannes Henricus VAN DAL
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Abstract
A method of forming a semiconductor device includes forming a contact metal layer, forming a channel structure on the contact metal layer, wherein the channel structure comprises a first source/drain region, a channel region and a second source/drain region stacked in that order, and forming a gate structure around the channel region, such that an upper surface of the gate structure is substantially coplanar with an upper surface of the channel structure.
Claims20
A transistor, comprising:
- a metal layer;
- a channel structure on the metal layer and extending lengthwise perpendicular to the metal layer, comprising a channel region and a pair of source/drain regions on opposing sides of the channel region;
- and
- a gate structure around the channel region.
1 more element
A semiconductor device, comprising:
- a metal layer;
- a channel structure contacting the metal layer and extending lengthwise perpendicular to the metal layer;
- and
- a gate structure surrounding the channel structure and including a first portion having a first width on a first side of the channel structure and a second portion having a second width greater than the first width on a second side of the channel structure.
1 more element
A transistor, comprising:
- a metal layer;
- a spacer layer on the metal layer;
- a channel structure contacting the metal layer through the spacer layer and extending lengthwise perpendicular to the metal layer;
- a dielectric layer on the spacer layer and surrounding the channel structure;
- and
- a gate structure surrounding the dielectric layer.
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Dependencies are inferred from the claim text.