# US 2025/0156084 A1 · Storage system with efficient block consolidation

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- Number: US 2025/0156084 A1
- Document ID: US20250156084A1
- Status: Published application
- Kind: A1
- Application number: 19/022,826
- Filed: 2025-01-15
- Published: 2025-05-15
- Earliest claimed: 2016-12-19
- Assignees: Pure Storage, Inc.
- Applicants: Pure Storage, Inc.
- Inventors: RONALD KARR
- Web page: https://patentgrep.com/patent/US20250156084A1

## CPC

- G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors}
- G06F 3/0644: {Management of space entities, e.g. partitions, extents, pools}
- G06F 3/0608: {Saving storage space on storage systems}
- G06F 3/061: {Improving I/O performance}
- G06F 3/0613: {in relation to throughput}
- G06F 3/064: {Management of blocks}
- G06F 3/0655: {Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0683: {Plurality of storage devices}
- G06F 3/0688: {Non-volatile semiconductor memory arrays}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A list of a available zones across respective SSD storage portions of a plurality of zoned storage devices of a storage system is maintained. Data is received from multiple sources, wherein the data is associated with processing a dataset, the dataset including multiple volumes and associated metadata. Shards of the data are determined such that each shard is capable of being written in parallel with the remaining shards. The shards are mapped to a subset of the available zones, respectively. The shards are written to the subset of the available zones in parallel.

## Claims

### Claim 1

A method comprising:
providing a plurality of storage devices, wherein each storage device of the plurality of storage devices comprises a solid-state drive (SSD) storage portion having a logical address space of a namespace divided into allocation units;
monitoring available allocation units across corresponding SSD storage portions of the plurality of storage devices;
receiving data from a plurality of sources that is associated with processing a dataset comprising multiple segments; and
writing a plurality of shards of the data to a subset of the plurality of available allocation units of the storage devices in parallel.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
writing an erasure code that corresponds to the data to a subset of the available allocation units.

### Claim 3 (depends on 1)

The method of claim 1, wherein the erasure code comprises a first portion and a second portion, and wherein writing the erasure code further comprises:
writing the first portion to a first allocation unit of the subset of the available allocation units and the second portion to a second allocation unit of the subset of the available allocation units in parallel with the first portion.

### Claim 4 (depends on 1)

The method of claim 1, wherein the SSD storage portion of each storage device of the plurality of storage devices comprises a direct-mapped SSD storage portion, wherein the direct-mapped SSD storage portion avoids SSD controller translation.

### Claim 5 (depends on 4)

The method of claim 4, wherein the direct-mapped SSD storage portion has erase blocks mapped as directly addressable storage of the SSD, and wherein two of the erase blocks of the direct-mapped SSD storage portion have differing sizes.

### Claim 6 (depends on 1)

The method of claim 1, wherein the plurality of storage devices further comprise a non-volatile random-access memory (NVRAM) portion to journal the data, and wherein the SSD portion and the NVRAM portion are separately addressable.

### Claim 7 (depends on 6)

The method of claim 6, wherein the NVRAM portion comprises a random access memory (RAM) device, a stored energy device, and a processing device.

### Claim 8

A non-transitory computer-readable storage medium including instructions which, when executed by a processing device of a storage controller, cause the processing device to:
monitor available allocation units across corresponding SSD storage portions of the plurality of storage devices;
receive data from a plurality of sources that is associated with processing a dataset comprising multiple segments; and
write a plurality of shards of the data to a subset of the plurality of available allocation units of the storage devices in parallel.

### Claim 9 (depends on 8)

The non-transitory computer-readable storage medium of claim 8, wherein the processing device is further configured to:
write an erasure code that corresponds to the data to a subset of the available allocation units.

### Claim 10 (depends on 9)

The non-transitory computer-readable storage medium of claim 9, wherein the erasure code comprises a first portion and a second portion, and wherein the processing device is further configured to:
write the first portion to a first allocation unit of the subset of the available allocation units and the second portion to a second allocation unit of the subset of the available allocation units in parallel with the first portion.

### Claim 11 (depends on 8)

The non-transitory computer-readable storage medium of claim 8, wherein the SSD storage portion of each storage device of the plurality of storage devices comprises a direct-mapped SSD storage portion, and wherein the direct-mapped SSD storage portion avoids SSD controller translation.

### Claim 12 (depends on 11)

The non-transitory computer-readable storage medium of claim 11, wherein the direct-mapped SSD storage portion has erase blocks mapped as directly addressable storage of the SSD, and wherein two of the erase blocks of the direct-mapped SSD storage portion have differing sizes.

### Claim 13 (depends on 8)

The non-transitory computer-readable storage medium of claim 8, further comprising a non-volatile random-access memory (NVRAM) portion to journal the data, wherein the SSD portion and the NVRAM portion are separately addressable.

### Claim 14

A storage system comprising:
a plurality of storage devices, wherein each storage device of the plurality of storage devices comprises a solid-state drive (SSD) storage portion having a logical address space of a namespace divided into allocation units; and
a storage controller, operatively coupled to the plurality of storage devices, the storage controller configured to:
monitor available allocation units across corresponding SSD storage portions of the plurality of storage devices;
receive data from a plurality of sources that is associated with processing a dataset comprising multiple segments; and
write a plurality of shards of the data to a subset of the plurality of available allocation units of the storage devices in parallel.

### Claim 15 (depends on 14)

The storage system of claim 14, wherein the storage controller is further configured to:
write an erasure code that corresponds to the data to a subset of the available allocation units.

### Claim 16 (depends on 15)

The storage system of claim 15, wherein the erasure code comprises a first portion and a second portion, and wherein to write the erasure code the storage controller further comprises:
write the first portion to a first allocation unit of the available allocation units and the second portion to a second allocation unit of the available allocation units in parallel with the first portion.

### Claim 17 (depends on 14)

The storage system of claim 14, wherein the SSD storage portion of each storage device of the plurality of storage devices comprises a direct-mapped SSD storage portion, and wherein the direct-mapped SSD storage portion avoids SSD controller translation.

### Claim 18 (depends on 17)

The storage system of claim 17, wherein the direct-mapped SSD storage portion has erase blocks mapped as directly addressable storage of the SSD, and wherein two of the erase blocks of the direct-mapped SSD storage portion have differing sizes.

### Claim 19 (depends on 14)

The storage system of claim 14, further comprising a non-volatile random-access memory (NVRAM) portion to journal the data, wherein the SSD portion and the NVRAM portion are separately addressable.

### Claim 20 (depends on 19)

The storage system of claim 19, wherein the NVRAM portion comprises a random access memory (RAM) device, a stored energy device, and a processing device.
