Channel coding method and apparatus

A channel coding method, comprising:

• receiving, by a network device, a third bit sequence;
• decoding, by the network device, the third bit sequence, to obtain a second bit sequence, wherein the second bit sequence comprises M bits;
• and
• determining, by the network device, a first bit sequence based on the second bit sequence, wherein the first N bits in the first bit sequence are in one-to-one correspondence with the last N bits in the second bit sequence, any bit in the first N bits in the first bit sequence has a same value as a bit that is in the last N bits in the second bit sequence and that is in one-to-one correspondence with the bit, M and N are positive integers, and M is greater than N.

A communication apparatus, comprising:

• a memory, configured to store computer instructions;
• and
• a processor, configured to execute the computer instructions stored in the memory, to enable the communication apparatus to perform steps of:
• generating a first bit sequence;
• determining a second bit sequence based on the first bit sequence, wherein the second bit sequence comprises M bits, the last N bits in the second bit sequence are in one-to-one correspondence with the first N bits in the first bit sequence, any bit in the last N bits in the second bit sequence has a same value as a bit that is in the first N bits in the first bit sequence and that is in one-to-one correspondence with the bit, M and N are positive integers, and M is greater than N;
• performing convolutional coding on the second bit sequence based on a convolutional encoder, to obtain a third bit sequence, wherein an initial value of a shift register of the convolutional encoder is equal to values of the last N bits in the second bit sequence, and the convolutional encoder comprises N shift registers;
• and
• sending the third bit sequence.

A communication apparatus, comprising:

• a memory, configured to store computer instructions;
• and
• a processor, configured to execute the computer instructions stored in the memory, to enable the communication apparatus to perform steps of:
• receiving a third bit sequence;
• decoding the third bit sequence, to obtain a second bit sequence, wherein the second bit sequence comprises M bits;
• and
• determining a first bit sequence based on the second bit sequence, wherein the first N bits in the first bit sequence are in one-to-one correspondence with the last N bits in the second bit sequence, any bit in the first N bits in the first bit sequence has a same value as a bit that is in the last N bits in the second bit sequence and that is in one-to-one correspondence with the bit, M and N are positive integers, and M is greater than N.