Interconnect structure with low rc delay and method for manufacturing the same

A method for manufacturing an interconnect structure, comprising:

• forming first sacrificial portions and electrically conductive portions on a base structure such that the sacrificial portions are disposed to alternate with the electrically conductive portions in a first direction, and such that each of the sacrificial portions and the electrically conductive portions is elongated in a second direction transverse to the first direction;
• forming a sacrificial layer to cover the sacrificial portions and the electrically conductive portions;
• forming an electrically conductive via which extends through the sacrificial layer so as to permit the electrically conductive via to be electrically connected to one of the electrically conductive portions;
• after formation of the electrically conductive via, performing a removal process to remove the sacrificial layer and the sacrificial portions so as to form a cavity;
• and
• forming a dielectric portion to fill the cavity.

An interconnect structure, comprising:

• a dielectric portion disposed on a base structure;
• a first electrically conductive portion and a second electrically conductive portion which are disposed in a lower part of the dielectric portion, and which are spaced apart from each other;
• and
• an electrically conductive via disposed in an upper part of the dielectric portion such that the electrically conductive via is capable of being electrically connected to the first electrically conductive portion, the electrically conductive via having a stepwise bottom surface, the stepwise bottom surface having a first horizontal region that is located at the first electrically conductive portion,
• the lower part and the upper part of the dielectric portion being made of a same material.