# US 2025/0148979 A1 · Display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2025/0148979 A1 - Document ID: US20250148979A1 - Status: Published application - Kind: A1 - Application number: 18/796,997 - Filed: 2024-08-07 - Published: 2025-05-08 - Earliest claimed: 2023-11-03 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., LTD. - Inventors: Min Joo KIM; Min Woo BYUN; Jong Sik SHIM; Dong Hwan JEON; Seon I JEONG; Sung Chan HWANG - Web page: https://patentgrep.com/patent/US20250148979A1 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED] - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0852: being a dynamic memory with more than one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage - G09G 2310/0262: The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements - G09G 2330/023: using energy recovery or conservation - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A display device includes: a light emitting element on a substrate; a first transistor configured to control a driving current flowing in the light emitting element; a second transistor configured to supply a data voltage to the gate electrode of the first transistor based on a first gate signal; a third transistor configured to supply a first reference voltage to the gate electrode of the first transistor based on a second gate signal; a fourth transistor configured to supply a second reference voltage different from the first reference voltage to the drain electrode of the first transistor based on a third gate signal; a fifth transistor configured to supply a driving voltage to the drain electrode of the first transistor based on a first emission signal; and a hold capacitor connected between a second reference line supplying the second reference voltage and the source electrode of the first transistor. ## Claims ### Claim 1 A display device comprising: a light emitting element on a substrate; a first transistor configured to control a driving current flowing in the light emitting element; a second transistor configured to supply a data voltage to a gate electrode of the first transistor based on a first gate signal; a third transistor configured to supply a first reference voltage to the gate electrode of the first transistor based on a second gate signal; a fourth transistor configured to supply a second reference voltage different from the first reference voltage to a drain electrode of the first transistor based on a third gate signal; a fifth transistor configured to supply a driving voltage to the drain electrode of the first transistor based on a first emission signal; and a hold capacitor connected between a second reference line supplying the second reference voltage and a source electrode of the first transistor. ### Claim 2 (depends on 1) The display device of claim 1, further comprising: a sixth transistor configured to electrically connect the source electrode of the first transistor and a first electrode of the light emitting element based on a second emission signal; a seventh transistor configured to discharge the source electrode of the first transistor to a first initialization voltage based on a fourth gate signal; and an eighth transistor configured to discharge a first electrode of the first transistor to a second initialization voltage based on the fourth gate signal. ### Claim 3 (depends on 2) The display device of claim 2, wherein one frame period is defined as comprising one address section and multiple self sections, wherein the third transistor is configured to be turned on by receiving the second gate signal during a first period of the address section and turned off during the multiple self sections, and wherein the fourth transistor is configured to be turned on by receiving the third gate signal during a second period of the address section and turned off during the multiple self sections. ### Claim 4 (depends on 3) The display device of claim 3, wherein each of the third and fourth transistors is configured to be turned on during the address section in which the fifth transistor and the sixth transistor are turned off. ### Claim 5 (depends on 3) The display device of claim 3, wherein the fifth transistor is configured to be turned on by receiving the first emission signal during the address section and a self section of the multiple self sections, and wherein the sixth transistor is configured to be turned on by receiving the second emission signal during the address section and the self section. ### Claim 6 (depends on 1) The display device of claim 1, further comprising: a sixth transistor electrically connecting the source electrode of the first transistor and the first electrode of the light emitting element based on the first emission signal; a seventh transistor configured to discharge the source electrode of the first transistor to a first initialization voltage based on a fourth gate signal; and an eighth transistor configured to discharge the first electrode of the light emitting element to a second initialization voltage based on the fourth gate signal. ### Claim 7 (depends on 6) The display device of claim 6, wherein one frame period is defined as comprising one address section and multiple self sections, wherein the third transistor is configured to be turned on by receiving the second gate signal during a first period of the address section and configured to be turned off during the multiple self sections, wherein the fourth transistor is configured to be turned on by receiving the third gate signal during a second period of the address section and configured to be turned off during the multiple self sections; and wherein the fifth and sixth transistors are configured to be turned on by receiving the first emission signal during the address section and the self section. ### Claim 8 (depends on 1) The display device of claim 1, wherein the first transistor further comprises a bias electrode connected to the source electrode of the first transistor and the hold capacitor. ### Claim 9 (depends on 1) The display device of claim 1, wherein each of the first to fourth transistors comprises an oxide-based active layer. ### Claim 10 A display device comprising: a light emitting element on a substrate; a first transistor configured to control a driving current flowing in the light emitting element; a second transistor configured to supply a data voltage to a gate electrode of the first transistor based on a first gate signal; a third transistor configured to supply a first reference voltage to the gate electrode of the first transistor based on a second gate signal; a fourth transistor configured to supply a driving voltage to a drain electrode of the first transistor based on a third gate signal; a fifth transistor configured to supply the driving voltage to the drain electrode of the first transistor based on a first emission signal; and a hold capacitor connected between a driving voltage line configured to supply the driving voltage and a source electrode of the first transistor. ### Claim 11 (depends on 10) The display device of claim 10, further comprising: a sixth transistor configured to electrically connect the source electrode of the first transistor and a first electrode of the light emitting element based on the first emission signal; a seventh transistor configured to discharge the source electrode of the first transistor to a first initialization voltage based on a fourth gate signal; and an eighth transistor configured to discharge the first electrode of the light emitting element to a second initialization voltage based on the fourth gate signal. ### Claim 12 (depends on 11) The display device of claim 11, wherein one frame period is defined as comprising one address section and multiple self sections, wherein the third transistor is configured to be turned on by receiving the second gate signal during a first period of the address section and configured to be turned off during the multiple self sections, and wherein the fourth transistor is configured to be turned on by receiving the third gate signal during a second period of the address section and configured to be turned off during the multiple self sections. ### Claim 13 (depends on 10) The display device of claim 10, further comprising: a sixth transistor configured to electrically connect the source electrode of the first transistor and a first transistor of the light emitting element based on a second emission signal; a seventh transistor configured to discharge the source electrode of the first transistor to a first initialization voltage based on a fourth gate signal; and an eighth transistor configured to discharge the first electrode of the light emitting element to a second initialization voltage based on the fourth gate signal. ### Claim 14 (depends on 10) The display device of claim 10, further comprising: a sixth transistor configured to electrically connect the source electrode of the first transistor and the first electrode of the light emitting element based on the first emission signal; a seventh transistor configured to discharge the source electrode of the first transistor to a first initialization voltage based on a fourth gate signal; and an eighth transistor configured to discharge the first electrode of the light emitting element to a second initialization voltage based on a fifth gate signal. ### Claim 15 (depends on 14) The display device of claim 14, wherein one frame period is defined as comprising one address section and multiple self sections, wherein the third transistor is configured to be turned on by receiving the second gate signal during a first period of the address section and configured to be turned off during the multiple self sections, and wherein the fourth transistor is configured to be turned on by receiving the third gate signal during a second period of the address section and configured to be turned off during the multiple self sections. ### Claim 16 (depends on 15) The display device of claim 15, wherein the seventh transistor is configured to be turned on by receiving the fourth gate signal during the address section and configured to be turned off during the multiple self sections, and wherein the eighth transistor is configured to be turned on by receiving the fifth gate signal during the address section and the self section. ### Claim 17 (depends on 10) The display device of claim 10, further comprising: a sixth transistor configured to electrically connect the source electrode of the first transistor and the first electrode of the light emitting element based on a second emission signal; and a seventh transistor configured to discharge the first electrode of the light emitting element to an initialization voltage based on a fourth gate signal. ### Claim 18 A display device comprising: a display area comprising a pixel; and a non-display area comprising a stage configured to supply a gate signal to the pixel, wherein the stage comprises a plurality of gate transistors including a silicon-based active layer configured to generate the gate signal, wherein the pixel comprises: a light emitting element on a substrate; a first transistor configured to control a driving current flowing in the light emitting element; a second transistor configured to supply a data voltage to ae gate electrode of the first transistor based on a first gate signal; a third transistor configured to supply a first reference voltage to the gate electrode of the first transistor based on a second gate signal; a fourth transistor configured to supply a second reference voltage different from the first reference voltage to a drain electrode of the first transistor based on a third gate signal; a fifth transistor configured to supply a driving voltage to the drain electrode of the first transistor based on a first emission signal; and a hold capacitor connected between a second reference line configured to supply the second reference voltage and a source electrode of the first transistor, wherein the first to fifth transistors include an oxide-based active layer. ### Claim 19 (depends on 18) The display device of claim 18, wherein one frame period is defined as comprising one address section and multiple self sections, wherein the third transistor is configured to be turned on by receiving the second gate signal during a first period of the address section and configured to be turned off during the multiple self sections, and wherein the fourth transistor is turned on by receiving the third gate signal during a second period of the address section and turned off during the multiple self sections. ### Claim 20 (depends on 19) The display device of claim 19, wherein the second transistor is configured to be turned on by receiving the first gate signal during a third period of the address section and configured to be turned off during the multiple self sections.