# US 2025/0147686 A1 · Data recovery in memory devices > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2025/0147686 A1 - Document ID: US20250147686A1 - Status: Published application - Kind: A1 - Application number: 19/017,960 - Filed: 2025-01-13 - Published: 2025-05-08 - Earliest claimed: 2018-02-09 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Sampath K. Ratnam; Vamsi Pavan Rayaprolu; Mustafa N. Kaynak; Sivagnanam Parthasarathy; Kishore Kumar Muchherla; Shane Nowell; Peter Feeley; Qisong Lin - Web page: https://patentgrep.com/patent/US20250147686A1 ## CPC - G06F 3/0647: {Migration mechanisms} - G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors} - G06F 3/0673: {Single storage device} - G06F 11/1068: {in sector programmable memories, e.g. flash disk (G06F11/1072 takes precedence)} - G06F 11/1072: {in multilevel memories} - G06F 11/1402: {Saving, restoring, recovering or retrying} - G11C 29/52: Protection of memory contents; Detection of errors in memory contents - G11C 2029/0411: {Online error correction} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract An example system includes a memory device; and a processing device, operatively coupled to the memory device, to perform operations, including: programming a plurality of pages of the memory device; adjusting a program verify voltage associated with the plurality of pages; responsive to determining that a first error rate of a first page of the plurality of pages exceeds a second error rate of a second page of the plurality of pages, performing a recovery operation on the first page to produce recovered data; and storing the recovered data on the memory device. ## Claims ### Claim 1 A system comprising: a memory device; and a processing device, operatively coupled to the memory device, to perform operations, comprising: programming a plurality of pages of the memory device; adjusting a program verify voltage associated with the plurality of pages; responsive to determining that a first error rate of a first page of the plurality of pages exceeds a second error rate of a second page of the plurality of pages, performing a recovery operation on the first page to produce recovered data; and storing the recovered data of the memory device. ### Claim 2 (depends on 1) The system of claim 1, wherein the recovery operation is based on parity data associated with the first page. ### Claim 3 (depends on 1) The system of claim 1, wherein adjusting the program verify voltage is performed responsive to performing a read operation with respect to the plurality of pages. ### Claim 4 (depends on 3) The system of claim 3, wherein the read operation is performed before a second programming pass of a two-pass programming operation. ### Claim 5 (depends on 1) The system of claim 1, wherein the recovery operation is performed responsive to inspecting identification information associated with the first page. ### Claim 6 (depends on 1) The system of claim 1, wherein the first error rate is produced by an error correction operation. ### Claim 7 (depends on 1) The system of claim 1, wherein the first page is associated with a first block of the memory device and the second page is associated with a second block of the memory device. ### Claim 8 A method, comprising: programming, by a processing device, a plurality of pages of a memory device; adjusting a program verify voltage associated with the plurality of pages; responsive to determining that a first error rate of a first page of the plurality of pages exceeds a second error rate of a second page of the plurality of pages, performing a recovery operation on the first page to produce recovered data; and storing the recovered data on the memory device. ### Claim 9 (depends on 8) The method of claim 8, wherein the recovery operation is based on parity data associated with the first page. ### Claim 10 (depends on 8) The method of claim 8, wherein adjusting the program verify voltage is performed responsive to performing a read operation with respect to the plurality of pages. ### Claim 11 (depends on 8) The method of claim 8, wherein the read operation is performed before a second programming pass of a two-pass programming operation. ### Claim 12 (depends on 8) The method of claim 8, wherein the recovery operation is performed responsive to inspecting identification information associated with the first page. ### Claim 13 (depends on 8) The method of claim 8, wherein the first error rate is produced by an error correction operation. ### Claim 14 (depends on 8) The method of claim 8, wherein the first page is associated with a first block of the memory device and the second page is associated with a second block of the memory device. ### Claim 15 A non-transitory computer-readable storage medium comprising executable instructions that, when executed by a processing device, cause the processing device to perform operations, comprising: programming a plurality of pages of a memory device; adjusting a program verify voltage associated with the plurality of pages; responsive to determining that a first error rate of a first page of the plurality of pages exceeds a second error rate of a second page of the plurality of pages, performing a recovery operation on the first page to produce recovered data; and storing the recovered data on the memory device. ### Claim 16 (depends on 15) The non-transitory computer-readable storage medium of claim 15, wherein the recovery operation is based on parity data associated with the first page. ### Claim 17 (depends on 15) The non-transitory computer-readable storage medium of claim 15, wherein adjusting the program verify voltage is performed responsive to performing a read operation with respect to the plurality of pages. ### Claim 18 (depends on 15) The non-transitory computer-readable storage medium of claim 15, wherein the read operation is performed before a second programming pass of a two-pass programming operation. ### Claim 19 (depends on 15) The non-transitory computer-readable storage medium of claim 15, wherein the recovery operation is performed responsive to inspecting identification information associated with the first page. ### Claim 20 (depends on 15) The non-transitory computer-readable storage medium of claim 15, wherein the first error rate is produced by an error correction operation.