# US 2025/0147673 A1 · Data Routing In Networked SSDs > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2025/0147673 A1 - Document ID: US20250147673A1 - Status: Published application - Kind: A1 - Application number: 18/503,649 - Filed: 2023-11-07 - Published: 2025-05-08 - Earliest claimed: 2023-11-07 - Assignees: Western Digital Technologies, Inc. - Applicants: Western Digital Technologies, Inc. - Inventors: Dattatreya NAYAK; Narendra BAYANABOINA; Ramanathan MUTHIAH - Web page: https://patentgrep.com/patent/US20250147673A1 ## CPC - G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors} - G06F 3/061: {Improving I/O performance} - G06F 3/0647: {Migration mechanisms} - G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling} - G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} - G06F 12/0246: {in block erasable memory, e.g. flash memory} - G06F 12/0253: {Garbage collection, i.e. reclamation of unreferenced memory} - G06F 2212/7208: Multiple device management, e.g. distributing data over multiple flash devices - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Instead of all the NAND memory having asynchronous independent plane read (AIPR) enabled, a system utilizes a master-SSD to route data to multiple client SSDs via a controller memory buffer (CMB) according to the underlying NAND hardware (HW) of each of the client SSDs. The master-SSD will also analyze the application data retrieval of the logical data that is to be routed. The system comprises SSDs with AIPR NAND circuitry and SSDs with non-AIPR NAND circuitry. The system further comprises the master-SSD that will route data to any of the SSDs in the system based on the data retrieval type (sequential or random). Each of the SSDs can be of a different type beyond the NAND chip, such as HW IPs or specific firmware (FW) that is tuned towards specific data routing and retrieval requirements. ## Claims ### Claim 1 A data storage device, comprising: a memory device, wherein the memory device has a first location for storing data expected to be randomly read and a second location for storing data expected to be sequentially read; and a controller coupled to the memory device, wherein the controller is configured to: receive a command to write data to the memory device; classify the data based upon whether the data is expected to be sequentially read or randomly read; and write the data to the memory device in either the first location or the second location based upon the classification. ### Claim 2 (depends on 1) The data storage device of claim 1, wherein the first location is physically distinct from the second location. ### Claim 3 (depends on 1) The data storage device of claim 1, wherein the first location comprises asynchronous independent plane read (AIPR) circuitry. ### Claim 4 (depends on 3) The data storage device of claim 3, wherein the second location does not comprise AIPR circuitry. ### Claim 5 (depends on 1) The data storage device of claim 1, wherein the controller is further configured to: receive a read command to read the data; determine that the data is incorrectly classified; and relocate the data to a different storage location. ### Claim 6 (depends on 5) The data storage device of claim 5, wherein the relocation occurs during garbage collection (GC). ### Claim 7 (depends on 1) The data storage device of claim 1, wherein the write command includes information on one or more of the following: stream identifier information; submission queue information; namespace location; and combinations thereof. ### Claim 8 (depends on 1) The data storage device of claim 1, wherein the controller is configured to parse the data prior to writing the data to obtain workload information, and wherein the controller is configured to predict whether the data is expected to be sequentially read or randomly read based upon the parsing. ### Claim 9 (depends on 1) The data storage device of claim 1, wherein the first location comprises one or more first solid state drives (SSDs) having asynchronous independent plane read (AIPR) circuitry, wherein the second location is one or more second SSDs that do not have AIPR circuitry, and wherein the one or more first SSDs and the one or more second SSDs are coupled to a third SSD. ### Claim 10 (depends on 9) The data storage device of claim 9, wherein the controller is disposed in the third SSD. ### Claim 11 A data storage device, comprising: a first solid state drive (SSD) having a controller; a second SSD coupled to the first SSD, wherein the second SSD comprises asynchronous independent plane read (AIPR) circuitry; and a third SSD coupled to the first SSD, wherein the third SSD does not include AIPR circuitry, and wherein the controller is configured to route data to the second SSD and the third SSD based upon a determination of whether the data will be sequentially read or randomly read. ### Claim 12 (depends on 11) The data storage device of claim 11, wherein the controller is configured to perform the determination by parsing the data. ### Claim 13 (depends on 11) The data storage device of claim 11, wherein the controller is configured to relocate the data upon determining that the data was written to an incorrect location. ### Claim 14 (depends on 11) The data storage device of claim 11, wherein the controller is configured to: receive a write command to write data that will be read sequentially; and write the data to the third SSD. ### Claim 15 (depends on 11) The data storage device of claim 11, wherein the controller is configured to: receive a write command to write data that will be read randomly; and write the data to the second SSD. ### Claim 16 (depends on 11) The data storage device of claim 11, wherein the controller is configured to: determine that the data should be written sequentially; determine that the data will be read randomly; and write the data to the second SSD. ### Claim 17 (depends on 11) The data storage device of claim 11, wherein the first SSD is connected to the second SSD using a controller memory buffer (CMB). ### Claim 18 A data storage device, comprising: means to store data; and a controller coupled to the means to store data, wherein the controller is configured to: determine whether data to be written to the means to store data will be sequentially read or randomly read; write the data to the means to store data in a location based upon the determining; determine that the data is improperly located based upon read characteristics; and relocate the data within the means to store data. ### Claim 19 (depends on 18) The data storage device of claim 18, wherein the location is a first location, wherein the means to store data comprises a second location, and wherein the first location and the second location have different characteristics. ### Claim 20 (depends on 19) The data storage device of claim 19, wherein the different characteristics are different circuitry.