Common local oscillator chip, cascading structure and working method

A common local oscillator chip, comprising a local oscillator module, a driving module, a multiplexing matching network, a local oscillator selection module, an output matching network, and a multiplexing transmission port;

• wherein the local oscillator module is configured to provide an internal local oscillator signal;
• wherein the driving module is connected to the local oscillator module, and the driving module is configured to transmit the internal local oscillator signal when activated;
• wherein the multiplexing matching network is connected to the driving module, and the multiplexing matching network is configured to output the internal local oscillator signal through the multiplexing transmission port, or the multiplexing matching network is configured to receive an external local oscillator signal through the multiplexing transmission ports;
• wherein the local oscillator selection module is connected to the local oscillator module and the multiplexing matching network, the local oscillator selection module is configured to select one for output from the internal local oscillator signal and the external local oscillator signal, and the chip local oscillator signal is generated through the output matching network based on the internal local oscillator signal or the external local oscillator signal;
• wherein the driving module comprises a first MOS transistor, a second MOS transistor, a third MOS transistor, and a fourth MOS transistor;
• and
• wherein gates of the first MOS transistor and the second MOS transistor are connected to the local oscillator module, sources of the first MOS transistor and the second MOS transistor are connected to ground, a drain of the first MOS transistor is connected to a source of the third MOS transistor, and a drain of the second MOS transistor is connected to a source of the fourth MOS transistor;
• and
• wherein a gate of the third MOS transistor is connected to a first bias voltage, a gate of the fourth MOS transistor is connected to a second bias voltage, and drains of the third MOS transistor and the fourth MOS transistor serve as output terminals of the driving module.