US 2025/0141472 A1 · STAIRCASE MATRIX CODE AND HIGHLY PARALLEL LOW-LATENCY ORDERED STATISTICS DECODING METHOD THEREOF

Abstract

Disclosed are a staircase matrix code and a highly parallel low-latency ordered statistics decoding (OSD) method thereof. The staircase matrix code may be divided into a staircase generator matrix code and a staircase parity-check matrix code, and a corresponding generator matrix or parity-check matrix thereof has a staircase structure, or has a staircase structure after row and column permutation. Based on the special staircase structure, special highly parallel low-latency OSD can be employed to decode the staircase matrix code. Specifically, at least one reliable bit is selected from bits corresponding to each staircase to constitute an extended reliable basis, then a corresponding generator matrix or parity-check matrix has an upper triangular or lower triangular structure. Under the special triangular structure, parallel Gaussian elimination of all rows can be implemented, and then re-encoding and the like are executed to complete decoding. The staircase structure proposed in the present disclosure is combined with a special OSD design, thereby solving the deficiency of conventional OSD that Gaussian elimination can only be executed serially, and the staircase structure can be further combined with locally constrained OSD and the like to reduce re-encoding times, thereby implementing low-latency, low-complexity and high-reliability decoding.

A staircase matrix code and a highly parallel low-latency ordered statistics decoding (OSD) method thereof, wherein a staircase matrix is described as:

the row of the staircase matrix is defined as =(, , ), wherein is a binary sequence with a length of 93 0≤m<lwm, is an all-l sequence with a length of ≥1, and is an all-zero sequence with a length of n− wm;
the staircase matrix code is divided into a staircase generator matrix code and a staircase parity-check matrix code from a definition perspective, wherein a generator matrix of the staircase generator matrix code has a staircase structure or has a staircase structure after row and column permutation, k groups of w=(w0, w1, . . . , wk−1) constitute a profile of the staircase generator matrix, and wi≥1, Σwi=n;
a parity-check matrix of the staircase parity-check matrix code has a staircase structure or has a staircase structure after row and column permutation, n−k groups of w=(w0, w1, . . . , wn−k−1) constitute a profile of the staircase parity-check matrix, and wi≥1, Σwi=n;
and an information sequence u ∈ and a staircase matrix code [n, k] are given, a specific coding and decoding process of the staircase matrix code and the highly parallel low-latency OSD method thereof comprising:
(1) a codeword c of the staircase generator matrix code is in a row generator space of a staircase generator matrix Gk×n, namely, c ∈ {uGk×n|u ∈ };
and a codeword c of the staircase parity-check matrix code is in a null space of a staircase parity-check matrix H(n−k)×n, namely, the codeword c satisfying H(n−k)×ncT=0;
(2) at a receiver, a received sequence y corresponding to the codeword c is received, and is demodulated and calculated to obtain a log-likelihood ratio sequence r ∈ , then a hard decision sequence z ∈ corresponding to the codeword is obtained according to r, and then a representative OSD algorithm is executed;
|rj| is defined as reliability corresponding to zj, e=(eL, eR) ∈ is defined as a test error pattern, then v=z−e ∈ is a test codeword;
and a parameter δ, 0≤δ≤n−k is set, and a specific process of decoding comprises:
(2.1) for the staircase generator matrix code, performing column permutation on the generator matrix based on reliability ranking of bits to obtain GΠ=[Lk×k|Mk×δ|Nk×(n−k−δ)], wherein L is an upper triangular or lower triangular matrix, corresponding to k reliable bits in k staircases, Mk×δ corresponds to δ reliable bits of the remaining bits, and performing permutation corresponding to Π on r, z, v and e to obtain {tilde over (r)}, {tilde over (z)}, {tilde over (v)} and {tilde over (e)};
and for the staircase parity-check matrix code, performing row and column permutation on the parity-check matrix based on the reliability ranking of bits to obtain
Π
L
⁢
H
⁢
Π
R
=
[
L
(
n
-
k
-
δ
)
×
(
n
-
k
-
δ
)
M
(
n
-
k
-
δ
)
×
(
k
+
δ
)
S
δ
×
(
n
-
k
-
δ
)
N
δ
×
(
k
+
δ
)
]
,
wherein L is an upper triangular or a lower triangular matrix, corresponding to n−k−δ unreliable bits in n−k staircases, and performing permutation corresponding to ΠR on r, z, v and e to obtain {tilde over (r)}, {tilde over (z)}, and {tilde over (e)};
(2.2) for the staircase generator matrix code, executing conventional Gaussian elimination or parallel Gaussian elimination of all k rows on the basis of GΠ to obtain {tilde over (G)}=[Ik×k|Pk×δ|Qk×(n−k−δ)], wherein Ik×k is a k-order unit matrix;
and for the staircase parity-check matrix code, executing conventional Gaussian elimination processing or parallel Gaussian elimination processing of all n−k rows on the basis of ΠLHΠR to obtain
H
~
=
[
I
(
n
-
k
-
δ
)
×
(
n
-
k
-
δ
)
P
(
n
-
k
-
δ
)
×
(
k
+
δ
)
O
δ
×
(
n
-
k
-
δ
)
Q
δ
×
(
k
+
δ
)
]
,
wherein I(n−k−δ)×(n−k−δ) is an n−k−δ—order unit matrix, and Oδ×(n−k−δ) is an all-zero sub-matrix;
and
(2.3) searching a test error pattern based on {tilde over (G)} or {tilde over (H)}, and executing re-encoding to obtain a candidate codeword list, and then selecting a candidate codeword having a most likelihood or satisfying a certain check as decoding outputs to complete decoding.

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Staircase matrix code and highly parallel low-latency ordered statistics decoding method thereof

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Staircase matrix code and highly parallel low-latency ordered statistics decoding method thereof

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Abstract

Claims8