Apparatuses and methods for calibrating adjustable impedances of a semiconductor device
AssigneeLodestar Licensing Group LLC
InventorDean Gans
Life of this patent
Estimating the term…
Abstract
Apparatuses and methods for calibrating adjustable impedances of a semiconductor device are disclosed in the present application. An example apparatus includes a register configured to store impedance calibration information and further includes programmable termination resistances having a programmable impedance. The example apparatus further includes an impedance calibration circuit configured to perform a calibration operation to determine calibration parameters for setting the programmable impedance of the programmable termination resistances. The impedance calibration circuit is further configured to program the impedance calibration information in the register related to the calibration operation.
Claims20
A system comprising:
- at least one memory controller configured to provide commands, wherein the commands include a register read command to read calibration information from a register;
- first and second memory devices configured to receive the commands, the first and second memory devices comprising programmable termination resistances having a programmable impedance, each memory device further comprising a calibration circuit configured to perform calibration operations to determine calibration parameters for setting the programmable impedance, wherein the calibration operations include a background calibration operation performed without receiving a calibration command from the at least one memory controller;
- a shared external resistor coupled to a power supply voltage and the first and second memory devices, wherein the shared external resistor is configured to be used to perform the calibration operations;
- and
- a memory bus coupled to the at least one memory controller and the first and second memory devices, wherein the memory bus is configured to transmit the commands from the at least one controller to the first and second memory devices.
A method comprising:
- performing, at a memory device of a plurality of memory devices, a calibration operation to determine calibration parameters for setting a programmable impedance of a programmable termination resistance, wherein the calibration operation is a background calibration operation performed without receiving a command from a memory controller, and wherein the calibration operation uses an external resistor shared by the plurality of memory devices;
- and
- receiving, by the memory device of the plurality of memory devices and from the memory controller, a register read command to read calibration information from a register of the memory device.
A method comprising:
- providing, by a memory controller, a register read command to a register of a memory;
- receiving, by the memory controller and responsive to the register read command, at least one bit from the register of the memory;
- and
- determining, based on a value of the at least one bit from the register of the memory, availability of updated calibration parameters for programmable termination resistances of the memory, the updated calibration parameters having been determined using at least one calibration operation performed by the memory, the at least one calibration operation including a background calibration operation performed without receiving a calibration command from the memory controller.
An apparatus comprising:
- a memory controller configured to:
- provide a register read command to a register of a memory;
- receive, responsive to the register read command, at least one bit from the register of the memory;
- and
- determine, based on a value of the at least one bit from the register of the memory, availability of updated calibration parameters for programmable termination resistances of the memory, the updated calibration parameters having been determined using at least one calibration operation performed by the memory, the at least one calibration operation including a background calibration operation performed without receiving a calibration command from the memory controller.
Dependencies are inferred from the claim text.