Three-dimensional semiconductor memory devices
AssigneeSamsung Electronics Co., Ltd.
InventorsYounghwan Son, Jeehoon Han
Life of this patent
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Abstract
Three-dimensional (3D) semiconductor memory devices are provided. A 3D semiconductor memory device includes an electrode structure on a substrate. The electrode structure includes gate electrodes stacked on the substrate. The gate electrodes include electrode pad regions. The 3D semiconductor memory device includes a dummy vertical structure penetrating one of the electrode pad regions. The dummy vertical structure includes a dummy vertical semiconductor pattern and a contact pattern extending from a portion of the dummy vertical semiconductor pattern toward the substrate.
Claims21
-20. (canceled)
A three-dimensional (3D) semiconductor memory device comprising:
- a substrate;
- an electrode structure on a first region of the substrate, the electrode structure comprising gate electrodes stacked in a first direction that is perpendicular to a top surface of the substrate, and the electrode structure extending on a second region of the substrate;
- a first source conductive pattern between the first region of the substrate and the electrode structure;
- a vertical pattern that extends into the electrode structure and the first source conductive pattern on the first region of the substrate;
- and
- a dummy vertical pattern that extends into the electrode structure on the second region of the substrate,
- wherein a lowermost surface of the dummy vertical pattern is at a lower height than a lowermost surface of the vertical pattern, from the top surface of the substrate.
A three-dimensional (3D) semiconductor memory device comprising:
- a substrate;
- an electrode structure on a first region of the substrate, the electrode structure comprising gate electrodes stacked in a first direction that is perpendicular to a top surface of the substrate, and the electrode structure extending on a second region of the substrate;
- a first source conductive pattern between the first region of the substrate and the electrode structure;
- a vertical pattern that extends into the electrode structure and the first source conductive pattern on the first region of the substrate;
- and
- a dummy vertical pattern that extends into the electrode structure on the second region of the substrate,
- wherein each of the dummy vertical pattern and the vertical pattern extends into the substrate,
- wherein the vertical pattern comprises:
- a data storage pattern that extends into the electrode structure;
- and
- a residual data storage pattern in the substrate and spaced apart from the data storage pattern in the first direction,
- wherein the dummy vertical pattern comprises a dummy data storage pattern that extends into the electrode structure and extends into the substrate.
A three-dimensional (3D) semiconductor memory device comprising:
- a substrate;
- an electrode structure on a first region of the substrate, the electrode structure comprising gate electrodes stacked in a first direction that is perpendicular to a top surface of the substrate, and the electrode structure extending on a second region of the substrate;
- a first source conductive pattern between the first region of the substrate and the electrode structure;
- a lower sacrificial pattern between the second region of the substrate and the electrode structure;
- a vertical pattern that extends into the electrode structure and the first source conductive pattern on the first region of the substrate;
- and
- a dummy vertical pattern that extends into the electrode structure and the lower sacrificial pattern on the second region of the substrate,
- wherein a thickness in the first direction of the lower sacrificial pattern is less than a thickness in the first direction of the first source conductive pattern,
- wherein each of the dummy vertical pattern and the vertical pattern extends into the substrate, and
- wherein a lowermost surface of the dummy vertical pattern is at a lower height than a lowermost surface of the vertical pattern, from the top surface of the substrate.
Dependencies are inferred from the claim text.