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US 2025/0132735 A1Published application
Circuits for amplfication of a delta-sigma modulated bit-stream
OwnerDjuro George Zrilicinventor
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Abstract
The present invention relates to method and apparatus for the amplification by two of delta-sigma modulated bit-stream. The proposed amplifier consists of 5-bit up/down counter, and 2 delta-adders connected in the feedback of the counter. However, the proposed amplifier can be used for amplification of the attenuated sum of two or more synchronous Δ-Σ bit-streams.
Claims3
A Δ-Σ amplifier for amplification by two (2), comprising:
- a Δ-Σ modulator for producing pulse density bit-stream Xn;
- a 5-bit up/down counter;
- two feedback delta adders, ΔA2 and ΔA3.
A Δ-Σ amplifier for amplification by two (2), comprising:
- a Δ-Σ modulator for producing pulse density bit-stream Xn;
- two D flip-lops;
- five digital logic gates.
A Δ-Σ amplifier for amplification by three (3) comprising:
- a Δ-Σ modulator for producing pulse density bit-stream Xn;
- three D flip-flops;
- five digital logic gates;
- a generator of idle sequence In;
- a delta adder (ΔA) to produce attenuated signal Zn.
2 more elements
Dependencies are inferred from the claim text.