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US 2025/0110696 A1Published application
Multiplication method and electronic circuit
AssigneeSTMicroelectronics International N.V.
InventorFabrice ROMAIN
Life of this patent
Estimating the term…
Abstract
A digital multiplicand is received. An initial digital multiplier including logical 0s and 1s is also received. The initial multiplier is processed including at the beginning of each string with at least one logical 1 of the initial multiplier, by applying, or not, in a selective manner, a Booth encoding on said string so as to output a final multiplier. The multiplicand is then multiplied by the final multiplier to produce an output.
Claims9
A multiplication method, comprising:
- receiving a digital multiplicand;
- receiving an initial digital multiplier including logical 0s and logical 1s;
- processing the initial digital multiplier, at a beginning of each string with at least one logical 1 of the initial digital multiplier, by selectively applying a Booth encoding on said string with at least one logical 1 so as to output a final multiplier;
- and
- multiplying the digital multiplicand by the final multiplier.
2 more elements
A multiplication electronic circuit, comprising:
- a first input configured to receive a digital multiplicand;
- a second input configured to receive an initial digital multiplier which includes logical 0s and logical 1s;
- a first stage circuit configured to receive the initial digital multiplier, and to selectively apply at a beginning of each string with at least one logical 1 of the initial digital multiplier a Booth encoding on said string with at least one logical 1 and output a final multiplier;
- and
- a multiplication stage circuit configured to perform multiplication of the digital multiplicand by the final multiplier.
2 more elements
Dependencies are inferred from the claim text.