Fault detection circuit
AssigneeTexas Instruments Incorporated
InventorWeibing Jing
Life of this patent
Estimating the term…
Abstract
Fault detection circuits and methods. An example of a fault detection circuit includes a comparator configured to compare a voltage at a voltage terminal with a reference voltage, a digital logic circuit coupled to a test terminal and configured to receive, responsive to the voltage at the voltage terminal being less than the reference voltage as indicated by the comparator, a test signal, the digital logic circuit including at least one digital logic gate, and an edge detection circuit configured to (a) monitor a signal produced at an output of the at least one digital logic gate, and (b) based on the signal failing to transgress a threshold within a time period, providing a fault signal indicating detection of a fault at the test terminal.
Claims26
A fault detection circuit comprising:
- a first logic gate having a first input terminal coupled to a test terminal;
- a second logic gate having a first input terminal coupled to a test signal terminal and an output terminal coupled to a second input terminal of the first logic gate;
- a first sequential logic device;
- a voltage comparator having first and second comparator input terminals and a comparator output terminal, the first comparator input terminal coupled to a voltage terminal, the second comparator input terminal coupled to a reference voltage terminal, and the comparator output terminal coupled to an input terminal of the first sequential logic device;
- a delay device coupled between the test signal terminal and a second input terminal of the second logic gate;
- and
- a digital logic circuit coupled to an output terminal of the first logic gate and having at least one fault detection output terminal.
A fault detection circuit for detecting a fault condition in a switching voltage regulator, the fault detection circuit comprising:
- a voltage comparator having first and second comparator input terminals and a comparator output terminal, the first comparator input terminal coupled to a reference voltage terminal;
- a digital logic circuitry coupled to a test terminal, a test signal terminal, and the comparator output terminal;
- and
- a delay device coupled between the test signal terminal and the digital logic circuitry, the delay device configured to produce a delayed copy of a test signal applied at the test signal terminal;
- wherein the digital logic circuitry is configured to produce a monitor signal based on a combination of the test signal, the delayed copy of the test signal, and a test voltage at the test terminal, and to produce a fault signal indicative of the fault condition based on a failure of the monitor signal to transgress a threshold value within a time period.
A fault detection circuit comprising:
- a comparator configured to compare a voltage at a voltage terminal with a reference voltage;
- a digital logic circuit coupled to a test terminal and configured to receive, responsive to the voltage at the voltage terminal being less than the reference voltage as indicated by the comparator, a test signal, the digital logic circuit including at least one digital logic gate;
- and
- an edge detection circuit configured to (a) monitor a signal produced at an output of the at least one digital logic gate, and (b) based on the signal failing to transgress a threshold within a time period, providing a fault signal indicating detection of a fault at the test terminal.
Dependencies are inferred from the claim text.