Programmable device, programmable device array, operation methods therefor, and memory

Abstract

Provided are a programmable device, a programmable device array, operation methods therefor, and a memory. The programmable device includes: a bit line; a select transistor, a first source/drain of the select transistor being electrically connected to the bit line; a select signal line, the select signal line being electrically connected to a gate of the select transistor; a plurality of diodes; a plurality of anti-fuse cells, a first end of each one of the plurality of anti-fuse cells being electrically connected to a second source/drain of the select transistor via a corresponding one of the plurality of diodes; and a plurality of word lines, each one of the plurality of word line being electrically connected to a second end of a corresponding one of the plurality of anti-fuse cells.

Dependencies are inferred from the claim text.