System and method for zero-voltage detection in resonant pole inverters

A system comprising:

• one or more switching devices;
• one or more ZVD devices, each ZVD device associated with a switching device and comprising:
• a voltage divider comprising:
• a resistive divider comprising:
• one or more resistors connected in series, and
• a capacitive divider comprising:
• one or more capacitors connected in series,
• wherein the voltage divider scales down a first voltage to a second voltage,
• a comparator,
• wherein the comparator compares the second voltage to one or more voltage thresholds determined based on an expected zero-voltage instant and the comparator outputs a first set of signals indicative of an estimation of the second voltage approaching a zero-voltage instant to compensate for a time delay from the voltage divider;
• and
• a flip flop,
• wherein the flip flop obtains the first set of signals and outputs a second set of signals to control a switching operation of the switching device;
• and
• a control system,
• wherein the control system is configured to obtain the second set of signals during a defined time window, and the control system forces the switching device to turn on at an end of the defined time window if the second set of signals is not detected to limit turn-on losses.

A method comprising:

• obtaining, by a zero voltage detection (ZVD) device, a first voltage applied to a switching device as input;
• scaling down, by the ZVD device, the first voltage to a second voltage within a time delay;
• comparing, by the ZVD device, the second voltage to one or more voltage thresholds and generating a first set of signals as output indicative of an estimation of the first voltage approaching a zero-volt instant;
• generating, by the ZVD device, a second set of signals as output to cycle the switching device on/off based on the first set of signals;
• and
• forcing, by the ZVD device, the switching device to turn on if the second set of signals is not detected at an end of a defined time window to limit turn-on losses;
• wherein the one or more voltage thresholds are configured to compensate for the time delay.