Ceramic substrate, ceramic circuit substrate, and semiconductor device
AssigneesKabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.
InventorsYoshihito YAMAGATA, Katsuyuki AOKI
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Abstract
A ceramic substrate according to an embodiment includes a ratio A/B of an arc discharge voltage A to a dielectric breakdown voltage B of not less than 0.3 when the arc discharge voltage A (kV) is measured when an arc discharge is detected when applying an AC voltage of 50 Hz or 60 Hz between a front surface and a back surface of the ceramic substrate at a voltage increase rate of 200 V/s, and when the dielectric breakdown voltage B (kV) between the front surface and the back surface is measured according to IEC 672-2.
Claims20
A ceramic substrate, comprising:
- a ratio A/B of an arc discharge voltage A to a dielectric breakdown voltage B of not less than 0.3 when the arc discharge voltage A (kV) is measured when an arc discharge is detected when applying an alternating current voltage of 50 Hz or 60 Hz between a front surface and a back surface of the ceramic substrate at a voltage increase rate of 200 V/s, and when the dielectric breakdown voltage B (kV) between the front surface and the back surface is measured according to IEC 672-2.
A ceramic substrate, wherein
- a thickness of the ceramic substrate is within a range of not less than 0.2 mm and not more than 3 mm, and
- there is a 90 μm×120 μm region in any cross section in which:
- a number of first voids having areas of less than 1 μm2 is within a range of not less than 30 and not more than 500;
- and
- a number of second voids having areas of not less than 1 μm2 is within a range of not less than 0 and not more than 30.
Dependencies are inferred from the claim text.